AD9528BCPZ datasheet(57/68 Pages) AD

57 / 68 page

AD9528

Data Sheet

Rev. C | Page 56 of 67

Address

Bits

Bit Name

Description

0x010A

[7:4]

Reserved

Reserved.

Holdover mode

High permits the VCXO_CTRL control voltage to be forced to midsupply when the

feedback or input clocks fail. Low tristates the charge pump output.

1 = VCXO_CTRL control voltage goes to VCC/2.

0 = VCXO_CTRL control voltage tracks the tristated (high impedance) charge pump

(through the buffer).

[2:0]

Reference selection mode,

Bits[2:0]

Programs the REFA, REFB mode selection (default = 000).

REF_SEL

Bit 2

Bit 1

Bit 0

Description

Nonrevertive: stay on REFB.

Revert to REFA.

Select REFA.

Select REFB.

REF_SEL pin = 0 (low): REFA.

REF_SEL pin = 1 (high): REFB.

1 X means don’t care.

Table 47. PLL Fast Lock (Register 0x010B)

PLL2 (REGISTER 0x0200 TO REGISTER 0x0209)

Table 48. PLL2 Charge Pump Control (Register 0x0200)

Table 49. PLL2 Feedback VCO CAL Divider Control (Register 0x0201)

Table 50. PLL2 Control (Register 0x0202)

Bits

Bit Name

Description

Lock detect power-down enable

Controls power-down of the PLL2 lock detector.

1 = lock detector powered down.

0 = lock detector active.

Reserved

Default = 0; value must remain 0.

Frequency doubler enable

Enables doubling of the PLL2 reference input frequency.

1 = enabled.

0 = disabled.

Bits

Bit Name

Description

PLL1 fast lock enable

Enables PLL1 fast lock operation.

[6:0]

Fast lock charge pump current (μA),

Bits[6:0]

These bits set the magnitude of the PLL1 charge pump current. Granularity is ~0.5 μA with a

full-scale magnitude of ~63.5 μA.

Bits

Bit Name

Description

[7:0]

PLL2 CP current (μA), Bits[7:0]

These bits set the magnitude of the PLL2 charge pump current. Granularity is ~3.5 μA with a

full-scale magnitude of ~900 μA.

Bits

Bit Name

Description

[7:6]

A divider, Bits[1:0]

A divider word

[5:0]

B divider, Bits[5:0]

B divider word

Feedback Divider Constraints

A Divider (Bits[7:6])

B Divider (Bits[5:0])

Allowed N Division (4 × B + A)

A = 0

B = 3

N = 16 to 255

A = 0 or A = 1

B = 4

A = 0 to A = 2

B = 5

A = 0 to A = 2

B = 6

A = 0 to A = 3

B ≥ 7

AD9528BCPZ Datasheet(PDF) 57 Page - Analog Devices

AD9528BCPZ Datasheet(HTML) 57 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

Datasheet Download

Link URL