WTS701MFSLASHT datasheet(15/77 Pages) WINBOND

15 / 77 page

WTS701

Publication Release Date: May 2003

- 15 -

Revision 3.09

7.2.4 SPI Interface

Communications with the WTS701 is conducted over the SPI serial communications port. The device

responds to a command when the Chip Select signal ( CS ) is LOW and addressed by an active LOW

signal on the SS (Slave Select) pin. Under this condition, it accepts data on the MOSI input, which is

clocked in on rising edges of the serial clock (SCLK) signal. Concurrently, valid data from the WTS701

device to the bus master is available on MISO for the HIGH period of SCLK. The protocol

implemented on the WTS701 defines that the first two bytes of data sent in an SPI transaction is a

command word. A transaction is defined as the SPI transfers conducted while SS is LOW, the

transaction ends when SS returns HIGH. A list of available commands can be found in subsection

7.10 (Text-To-Speech Processor Commands Quick Reference Table). The data flow over the SPI

interface is MSB first, both in and out of the WTS701.

All Input pins are 3V and 5V tolerant, except for the CS signal which is only 3V tolerant.

The following is a description of the WTS701 SPI interface signals:

SCLK (Serial Clock)

The Serial Clock line is a digital input. It is driven by the SPI master and controls the timing of the data

exchanged over the SPI data lines, MOSI and MISO. The maximum frequency for this pin is 5 MHz.

(Slave Select)

The Slave Select line is an active LOW digital input. It is driven by the SPI master and acts as a chip

select line. The device only responds to SPI transactions when this line is selected (LOW) and then

raised HIGH after SPI communication ends.

(Chip Select)

The Chip Select line is an active LOW digital input. It can be driven by the host controller to enable

SPI transactions to the device. Normally this pin is tied LOW unless more than one device is to share

the same SS signal.

MOSI (Master Out, Slave In)

The MOSI line is a digital input. MOSI is driven by the SPI master. It provides data transfer, MSB first,

from the master to the slave. (See page 64)

MISO (Master In, Slave Out)

The MISO line is an open drain digital output. When SS is HIGH, this pin is tri-state. When SS is

LOW, MISO is driven by the device. It provides serial data transfer, MSB first, from the slave to the

master.

WTS701MF/T Datasheet(PDF) 15 Page - Winbond