SLB128B datasheet(37/48 Pages) NSC

37 / 48 page

Scaler Information

DVO Input and Bypass Mode:

The input single port DVO data is translated into 18bit/24bit

RGB data for scaling. Single port data over 108MHz or dual

port data will be bypassed and not scaled. The LVDS output

can be single or dual port.

Input Timing Control:

The DS90C2501 input timing control can detect the input

timing information such as horizontal and vertical sync width,

pixel-total and line-total count and the active video starting

and ending positions. Such information can be provided to

the host through two-wire serial communication Interface to

help determine the input mode.

Display Synchronization

The DS90C2501 synchronizes the display timing with input

graphics timing so that no external frame buffer is needed.

There are three operation modes:

Free-run mode: No synchronization. Output timing is gener-

ated from external 14.318MHz reference clock.

Line lock mode: the display Hsync is synchronized with the

input line rate.

Frame lock mode: the display Vsync is synchronized with the

input frame rate.

In free-run mode, the display timing is decided by the values

programmed into the various timing registers. In line-lock

mode, the display line rate is a function of the selected input

clock, forcing the output frame rate to be locked to input

frame rate. Timing management is more complicated The

frame-lock mode is used more often. The output pixel clock

and Hsync are generated from the external 14.318MHz ref-

erence clock and the embedded PLL, but the Vsync is

refreshed at the input frame rate.

Gamma Look-up Table (LUT):

The DS90C2501 provides an 8-bit look-up-table (LUT) for

each input color channel in case gamma correction is

needed. The LUT is user programmable to provide an arbi-

trary transfer function.

The transmitter is offered with programmable edge data

strobes for convenient interface with a variety of graphics

controllers. The transmitter can be programmed for rising

edge strobe or falling edge strobe through a dedicated pin. A

rising edge transmitter will inter-operate with a falling edge

receiver without any translation logic.

Output Timing Control:

The DS90C2501 output timing is fully programmable through

two-wire serial communication Interface for different panel

requirements. When 6-bit color LCD is used, dithering (FRC)

can be turned on via two-wire serial communication pro-

gramming interface. The least two LSB of each color are

default to be logic low all the time. When 8-bit color LCD is

used, dithering (FRC) is not needed, and can be turned off

via two-wire serial communication programming interface.

See DS90C2501 guide for further information on program-

ming these features.

SLB128B Datasheet(PDF) 37 Page - National Semiconductor (TI)

SLB128B Datasheet(HTML) 37 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Datasheet Download

Link URL