11.2. Circuit for single ended mode

epc901

R

BIAS

VDD1V8

VDD7V0

VDD_OA

VIDEO_P

VIDEO_N

C

VDD7V0

C

VDD1V8

VDD

VDD

C

VDD

Communication

μC / FPGA

ADC

Configuration

Factory

(do not

connect)

32

20

8

10

CCD --> Frame Store Buffers --> CDS

9

VDD5V0

C

VDD5V0

18

VIDEO_CM

11

Video

Amp

C

VDD_OA

L

Figure 14: Single ended mode application diagram

In single-ended transmission mode, VIDEO_N and VIDEO_CM must be tied to ground. The output signal is available at VIDEO_P.

Illumination

VIDEO_P (typ.)

Dark voltage

0.4V

Maximum video output

2.0V

Table 29: Video amplifier output in single-ended mode

11.3. External components

The external components in Figure 13 and Figure 14 shall be as follows:

Param-

eter

Description

Value Units

Toler-

ance

Comments

External resistor defining the bias current

56k

kΩ

±1%

Resistance temperature coefficient max. ±100ppm/K

Decoupling capacitor for VDD1V8

1.0

μF

±20%

low ESR

Decoupling capacitor for VDD5V0

2.2

μF

±20%

low ESR

Decoupling capacitor for VDD7V0

2.2

μF

±20%

low ESR

Decoupling capacitor for VDD

1.0

μF

±20%

low ESR

Decoupling capacitor for VDD_OA

1.0

μF

±20%

low ESR

L

Decoupling inductor

600

Ω

e.g. Taiyo Yuden BK1005HR601-T

11.4. Low noise operation

11.4.1. Charge pump noise

The internal charge pump generates considerable noise, especially in single-ended mode. The noise performance can be optimized by

turning off the charge pump and supplying the chip with an external 5V supply. Refer to section 12.2..

11.4.2. Video amplifier noise

Another noise source is the video amplifier which can be used in two different modes. Single ended mode is the lower noise operation

mode. Thus, use the chip in single ended mode for low noise applications.

© 2016 ESPROS Photonics Corporation

Characteristics subject to change without notice

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