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HT68F005 Datasheet(PDF) 46 Page - Holtek Semiconductor Inc |
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HT68F005 Datasheet(HTML) 46 Page - Holtek Semiconductor Inc |
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46 / 93 page  Rev. 1.00 46 ��to�e� ��� �01� Rev. 1.00 47 ��to�e� ��� �01� HT68F005/HT68F006 Enhanced I/O Flash Type MCU HT68F005/HT68F006 Enhanced I/O Flash Type MCU • WatchdogTime-outResetduringNormalOperation TheWatchdogtime-outResetduringnormaloperationisthesameasaPower-onresetexcept thattheWatchdogtime-outflagTOwillbesetto“1”. t RS TD + t SST WD T Ti me - out In te r nal R es et Note:tRSTDispower-ondelay,typicaltime=16.7ms WDT Time-out Reset during Normal Operation Timing Chart • WatchdogTime-outResetduringSLEEPorIDLEMode TheWatchdogtime-outResetduringSLEEPorIDLEModeisalittledifferentfromotherkinds ofreset.MostoftheconditionsremainunchangedexceptthattheProgramCounterandtheStack Pointerwillbeclearedto“0”andtheTOflagwillbesetto“1”.RefertotheA.C.Characteristics fortSSTdetails. t SST WD T Ti me - out In te r nal R es et Note:ThetSSTis15~16clockcyclesifthesystemclocksourceisprovidedbyHIRC. ThetSSTis1024clockforHXT.ThetSSTis1~2clockforLIRC. WDT Time-out Reset during SLEEP or IDLE Timing Chart WDTC Register Software Reset AWDTCsoftwareresetwillbegeneratedwhenavalueotherthan“10101”or“01010”,existin thehighestfivebitsoftheWDTCregister.TheWRFbitintheCTRLregisterwillbesethigh whenthisoccurs,thusindicatingthegenerationofaWDTCsoftwarereset. • WDTC Register Bit 7 6 5 4 3 2 1 0 Name WE4 WE3 WE� WE1 WE0 WS� WS1 WS0 R/W R/W R/W R/W R/W R/W R/W R/W R/W P�R 0 1 0 1 0 0 1 1 Bit7~3 WE4, WE3, WE2, WE1, WE0:WDTSoftwareControl 10101:WDTDisable 01010:WDTEnable(default) Other:MCUreset Bit2~0 WS2, WS1, WS0:WDTtime-outperiodselection Describedelsewhere |
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