HT68F005 datasheet(13/93 Pages) HOLTEK

13 / 93 page

Rev. 1.00

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HT68F005/HT68F006

Enhanced I/O Flash Type MCU

HT68F005/HT68F006

Enhanced I/O Flash Type MCU

Power on Reset Electrical Characteristics

Ta=25˚C

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

VDD

Condition

VP�R

VDD Sta�t Voltage to ensu�e Powe�-on Reset

—

100

RP�R AC VDD Raising Rate to Ensu�e Powe�-on Reset

—

0.035

—

V/ms

tP�R

Minimum Time fo� VDD to �emain at VP�R to

ensu�e Powe�-on Reset

—

Ti me

V DD

V PO R

RR VD D

t PO R

System Architecture

Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributed

totheirinternalsystemarchitecture.Therangeofdevicestakeadvantageoftheusualfeaturesfound

withinRISCmicrocontrollersprovidingincreasedspeedofoperationandenhancedperformance.

Thepipeliningschemeisimplementedinsuchawaythatinstructionfetchingandinstruction

executionareoverlapped,henceinstructionsareeffectivelyexecutedinonecycle,withthe

exceptionofbranchorcallinstructions.An8-bitwideALUisusedinpracticallyallinstructionset

operations,whichcarriesoutarithmeticoperations,logicoperations,rotation,increment,decrement,

branchdecisions,etc.TheinternaldatapathissimplifiedbymovingdatathroughtheAccumulator

andtheALU.CertaininternalregistersareimplementedintheDataMemoryandcanbedirectly

orindirectlyaddressed.Thesimpleaddressingmethodsoftheseregistersalongwithadditional

architecturalfeaturesensurethataminimumofexternalcomponentsisrequiredtoprovidea

functionalI/Ocontrolsystemwithmaximumreliabilityandflexibility.Thismakesthesedevices

suitableforlow-cost,high-volumeproductionforcontrollerapplications.

Clocking and Pipelining

Themainsystemclock,derivedfromeitheraHXT,HIRCorLIRCoscillatorissubdividedinto

fourinternallygeneratednon-overlappingclocks,T1~T4.TheProgramCounterisincrementedat

thebeginningoftheT1clockduringwhichtimeanewinstructionisfetched.TheremainingT2~T4

clockscarryoutthedecodingandexecutionfunctions.Inthisway,oneT1~T4clockcycleforms

oneinstructioncycle.Althoughthefetchingandexecutionofinstructionstakesplaceinconsecutive

instructioncycles,thepipeliningstructureofthemicrocontrollerensuresthatinstructionsare

effectivelyexecutedinoneinstructioncycle.Theexceptiontothisareinstructionswherethe

contentsoftheProgramCounterarechanged,suchassubroutinecallsorjumps,inwhichcasethe

instructionwilltakeonemoreinstructioncycletoexecute.

Forinstructionsinvolvingbranches,suchasjumporcallinstructions,twomachinecyclesare

requiredtocompleteinstructionexecution.Anextracycleisrequiredastheprogramtakesone

cycletofirstobtaintheactualjumporcalladdressandthenanothercycletoactuallyexecutethe

branch.Therequirementforthisextracycleshouldbetakenintoaccountbyprogrammersintiming

sensitiveapplications.

HT68F005 Datasheet(PDF) 13 Page - Holtek Semiconductor Inc

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