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HT68F005 Datasheet(PDF) 35 Page - Holtek Semiconductor Inc |
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HT68F005 Datasheet(HTML) 35 Page - Holtek Semiconductor Inc |
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35 / 93 page  Rev. 1.00 34 ��to�e� ��� �01� Rev. 1.00 35 ��to�e� ��� �01� HT68F005/HT68F006 Enhanced I/O Flash Type MCU HT68F005/HT68F006 Enhanced I/O Flash Type MCU SL E EP0 HA LT i ns tr uc ti on is e xe cu te d f SYS of f CP U st op ID LE N= 0 f LI RC of f WD T of f NO RM AL f SYS =f H ~ f H /6 4 f H o n CP U ru n f SYS o n f LI RC o n ID LE 1 HA LT i ns tr uc ti on is e xe cu te d CP U st op ID LE N= 1 FS YS ON =1 f SYS o n f LI RC o n ID LE 0 HA LT i ns tr uc ti on is e xe cu te d CP U st op ID LE N= 1 FS YS ON =0 f SYS o ff f LI RC o n SL OW f SYS =f L f L o n CP U ru n f SYS o n f LI RC o n f H o ff SL E EP1 HA LT i ns tr uc ti on is e xe cu te d f SYS o ff CP U st op ID LE N= 0 f LI RC o n WD T on Operating Mode Switching and Wake-up Thesedevicescanswitchbetweenoperatingmodesdynamicallyallowingtheusertoselectthebest performance/powerratioforthepresenttaskinhand.Inthiswaymicrocontrolleroperationsthat donotrequirehighperformancecanbeexecutedusingslowerclocksthusrequiringlessoperating currentandprolongingbatterylifeinportableapplications. Insimpleterms,ModeSwitchingbetweentheNORMALModeandSLOWModeisexecuted usingtheHLCLKbitandCKS2~CKS0bitsintheSMODregisterwhileModeSwitchingfromthe NORMAL/SLOWModestotheSLEEP/IDLEModesisexecutedviatheHALTinstruction.When aHALTinstructionisexecuted,whetherthesedevicesentertheIDLEModeortheSLEEPMode isdeterminedbytheconditionoftheIDLENbitintheSMODregisterandFSYSONintheCTRL register. WhentheHLCLKbitswitchestoalowlevel,whichimpliesthatclocksourceisswitchedfromthe highspeedclocksource,fH,totheclocksource,fH/2~fH/64orfL.IftheclockisfromthefL,thehigh speedclocksourcewillstoprunningtoconservepower.Whenthishappensitmustbenotedthatthe fH/16andfH/64internalclocksourceswillalsostoprunning,whichmayaffecttheoperationofother internalfunctionssuchastheTMs.Theaccompanyingflowchartshowswhathappenswhenthese devicesmovebetweenthevariousoperatingmodes. |
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