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R5F564MFDDFB Datasheet(PDF) 118 Page - Renesas Technology Corp

Part # R5F564MFDDFB
Description  120-MHz 32-bit RX MCU, on-chip FPU, 240 DMIPS, up to 4-MB flash memory
PDF  228 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F564MFDDFB Datasheet(HTML) 118 Page - Renesas Technology Corp

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R01DS0173EJ0110 Rev.1.10
Page 118 of 228
Oct 24, 2016
RX64M Group
4. I/O Registers
000C 0310h
ETHER
C1
ETHERC Status Register
ECSR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 0318h
ETHER
C1
ETHERC Interrupt Enable Register
ECSIPR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 0320h
ETHER
C1
PHY Interface Register
PIR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 0328h
ETHER
C1
PHY Status Register
PSR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 0340h
ETHER
C1
Random Number Generation Counter Upper Limit
Setting Register
RDMLR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 0350h
ETHER
C1
Interpacket Gap Register
IPGR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 0354h
ETHER
C1
Automatic PAUSE Frame Register
APR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 0358h
ETHER
C1
Manual PAUSE Frame Register
MPR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 0360h
ETHER
C1
Received PAUSE Frame Counter
RFCF
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 0364h
ETHER
C1
PAUSE Frame Retransmit Count Setting Register
TPAUSER
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 0368h
ETHER
C1
PAUSE Frame Retransmit Counter Register
TPAUSECR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 036Ch
ETHER
C1
Broadcast Frame Receive Count Setting Register
BCFRR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 03C0h
ETHER
C1
MAC Address Upper Bit Register
MAHR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 03C8h
ETHER
C1
MAC Address Lower Bit Register
MALR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 03D0h
ETHER
C1
Transmit Retry Over Counter Register
TROCR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 03D4h
ETHER
C1
Late Collision Detect Counter Register
CDCR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 03D8h
ETHER
C1
Lost Carrier Counter Register
LCCR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 03DCh
ETHER
C1
Carrier Not Detect Counter Register
CNDCR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 03E4h
ETHER
C1
CRC Error Frame Receive Counter Register
CEFCR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 03E8h
ETHER
C1
Frame Receive Error Counter Register
FRECR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 03ECh
ETHER
C1
Too-Short Frame Receive Counter Register
TSFRCR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 03F0h
ETHER
C1
Too-Long Frame Receive Counter Register
TLFRCR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 03F4h
ETHER
C1
Received Alignment Error Frame Counter Register
RFCR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 03F8h
ETHER
C1
Multicast Address Frame Receive Counter Register
MAFCR
32
32
13, 14 PCLKA
2 to 7 ICLK
ETHER
C
000C 0400h
PTPED
MAC
EDMAC Mode Register
EDMR
32
32
4, 5 PCLKA
2, 3 ICLK
EDMAC
a
000C 0408h
PTPED
MAC
EDMAC Transmit Request Register
EDTRR
32
32
4, 5 PCLKA
2, 3 ICLK
EDMAC
a
000C 0410h
PTPED
MAC
EDMAC Receive Request Register
EDRRR
32
32
4, 5 PCLKA
2, 3 ICLK
EDMAC
a
000C 0418h
PTPED
MAC
Transmit Descriptor List Start Address Register
TDLAR
32
32
4, 5 PCLKA
2, 3 ICLK
EDMAC
a
000C 0420h
PTPED
MAC
Receive Descriptor List Start Address Register
RDLAR
32
32
4, 5 PCLKA
2, 3 ICLK
EDMAC
a
000C 0428h
PTPED
MAC
PTP/EDMAC Status Register
EESR
32
32
4, 5 PCLKA
2, 3 ICLK
EDMAC
a
000C 0430h
PTPED
MAC
PTP/EDMAC Status Interrupt Enable Register
EESIPR
32
32
4, 5 PCLKA
2, 3 ICLK
EDMAC
a
Table 4.1
List of I/O Registers (Address Order) (47 / 67)
Address
Module
Symbol Register Name
Register
Symbol
Number
of Bits
Access
Size
Number of Access Cycles
Related
Function
ICLK
PCLK
ICLK
 PCLK



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