HT56RB688_13 datasheet(84/164 Pages) HOLTEK

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· Start Signal

The START signal can only be generated by the master device connected to the I

2C bus and not by

the microcontroller, which is only a slave device. This START signal will be detected by all devices

connected to the I

2C bus. When detected, this indicates that the I2C bus is busy and therefore the

HBBn bit will be set. A START condition occurs when a high to low transition on the SDAn line

takes place when the SCLn line remains high.

· Slave Address

The transmission of a START signal by the master will be detected by all devices on the I

2C bus. To

determine which slave device the master wishes to communicate with, the address of the slave

device will be sent out immediately following the START signal. All slave devices, after receiving

this 7-bit address data, will compare it with their own 7-bit slave address. If the address sent out by

the master matches the internal address of the microcontroller slave device, then an internal I

2C bus

interrupt signal will be generated. The next bit following the address, which is the 8th bit, defines the

read/write status and will be saved to the SRWn bit of the SIMnCTL1 register. The device will then

transmit an acknowledge bit, which is a low level, as the 9th bit.

The microcontroller slave device will also set the status flag HAASn when the addresses match. As

an I

2C bus interrupt can come from two sources, when the program enters the interrupt subroutine,

the HAASn bit should be examined to see whether the interrupt source has come from a matching

slave address or from the completion of a data byte transfer. When a slave address is matched, the

device must be placed in either the transmit mode and then write data to the SIMnDR register, or in

the receive mode where it must implement a dummy read from the SIMnDR register to release the

SCLn line.

SIMnAR Register

Bit

76543210

Name

SnA6

SnA5

SnA4

SnA3

SnA2

SnA1

SnA0

R/W

POR

xxxxxxx

²x² means unknown.

Bit 7~1

SnA6~SnA0:I

2C slave address

SnA6~SnA0 is the I

2C slave address bit6~bit0.

The SIMnAR register is also used by the SPI interface but has the name SIMnCTL2. The

SIMnAR register is the location where the 7-bit slave address of the slave device is stored.

Bit7~bit1 of the SIMnAR register define the device slave address. Bit 0 is not defined.

When a master device, which is connected to the I

2C bus, sends out an address, which matches

the slave address in the SIMnAR register, the slave device will be selected. Note that the

SIMnAR register is the same register address as SIMnCTL2 which is used by the SPI interface.

Bit 0

Unimplemented bit.

This bit can be read or written by user software program.

Rev. 1.10

April 15, 2013

HT56RB688

TinyPowerTM A/D type Smart Card OTP MCU

with LCD, DAC, ISO 7816 and USB Interfaces

HT56RB688 Datasheet(PDF) 84 Page - Holtek Semiconductor Inc

HT56RB688 Datasheet(HTML) 84 Page - Holtek Semiconductor Inc

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