ELANSC520 datasheet(9/440 Pages) AMD

9 / 440 page

Table of Contents

Élan™SC520 Microcontroller Register Set Manual

GP Timer 0 Interrupt Mapping (GPTMR0MAP) . . . . . . . . . . . . . . . . . . . 12-21

GP Timer 1 Interrupt Mapping (GPTMR1MAP) . . . . . . . . . . . . . . . . . . . 12-21

GP Timer 2 Interrupt Mapping (GPTMR2MAP) . . . . . . . . . . . . . . . . . . . 12-21

PIT 0 Interrupt Mapping (PIT0MAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

PIT 1 Interrupt Mapping (PIT1MAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

PIT 2 Interrupt Mapping (PIT2MAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

UART 1 Interrupt Mapping (UART1MAP) . . . . . . . . . . . . . . . . . . . . . . . . 12-21

UART 2 Interrupt Mapping (UART2MAP) . . . . . . . . . . . . . . . . . . . . . . . . 12-21

PCI Interrupt A Mapping (PCIINTAMAP) . . . . . . . . . . . . . . . . . . . . . . . . 12-21

PCI Interrupt B Mapping (PCIINTBMAP) . . . . . . . . . . . . . . . . . . . . . . . . 12-21

PCI Interrupt C Mapping (PCIINTCMAP) . . . . . . . . . . . . . . . . . . . . . . . . 12-21

PCI Interrupt D Mapping (PCIINTDMAP) . . . . . . . . . . . . . . . . . . . . . . . . 12-21

DMA Buffer Chaining Interrupt Mapping (DMABCINTMAP). . . . . . . . . . 12-21

SSI Interrupt Mapping (SSIMAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

Watchdog Timer Interrupt Mapping (WDTMAP). . . . . . . . . . . . . . . . . . . 12-21

RTC Interrupt Mapping (RTCMAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

Write-Protect Violation Interrupt Mapping (WPVMAP) . . . . . . . . . . . . . . 12-21

AMDebug™ Technology RX/TX Interrupt Mapping (ICEMAP) . . . . . . . . 12-21

Floating Point Error Interrupt Mapping (FERRMAP) . . . . . . . . . . . . . . . 12-21

GPIRQ0 Interrupt Mapping (GP0IMAP) . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

GPIRQ1 Interrupt Mapping (GP1IMAP) . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

GPIRQ2 Interrupt Mapping (GP2IMAP) . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

GPIRQ3 Interrupt Mapping (GP3IMAP) . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

GPIRQ4 Interrupt Mapping (GP4IMAP) . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

GPIRQ5 Interrupt Mapping (GP5IMAP) . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

GPIRQ6 Interrupt Mapping (GP6IMAP) . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

GPIRQ7 Interrupt Mapping (GP7IMAP) . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

GPIRQ8 Interrupt Mapping (GP8IMAP) . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

GPIRQ9 Interrupt Mapping (GP9IMAP) . . . . . . . . . . . . . . . . . . . . . . . . . 12-21

GPIRQ10 Interrupt Mapping (GP10IMAP) . . . . . . . . . . . . . . . . . . . . . . . 12-21

Master PIC Interrupt Request (MPICIR). . . . . . . . . . . . . . . . . . . . . . . . . 12-24

Master PIC In-Service (MPICISR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-25

Master PIC Initialization Control Word 1 (MPICICW1) . . . . . . . . . . . . . . 12-26

Master PIC Operation Control Word 2 (MPICOCW2) . . . . . . . . . . . . . . 12-28

Master PIC Operation Control Word 3 (MPICOCW3) . . . . . . . . . . . . . . 12-30

Master PIC Initialization Control Word 2 (MPICICW2) . . . . . . . . . . . . . . 12-32

Master PIC Initialization Control Word 3 (MPICICW3) . . . . . . . . . . . . . . 12-33

Master PIC Initialization Control Word 4 (MPICICW4) . . . . . . . . . . . . . . 12-35

Master PIC Interrupt Mask (MPICINTMSK) . . . . . . . . . . . . . . . . . . . . . . 12-36

Slave 2 PIC Interrupt Request (S2PICIR) . . . . . . . . . . . . . . . . . . . . . . . 12-37

Slave 2 PIC In-Service (S2PICISR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-38

Slave 2 PIC Initialization Control Word 1 (S2PICICW1) . . . . . . . . . . . . . 12-39

Slave 2 PIC Operation Control Word 2 (S2PICOCW2) . . . . . . . . . . . . . 12-41

Slave 2 PIC Operation Control Word 3 (S2PICOCW3) . . . . . . . . . . . . . 12-43

Slave 2 PIC Initialization Control Word 2 (S2PICICW2) . . . . . . . . . . . . . 12-45

Slave 2 PIC Initialization Control Word 3 (S2PICICW3) . . . . . . . . . . . . . 12-46

Slave 2 PIC Initialization Control Word 4 (S2PICICW4) . . . . . . . . . . . . . 12-47

Slave 2 PIC Interrupt Mask (S2PICINTMSK) . . . . . . . . . . . . . . . . . . . . . 12-48

Slave 1 PIC Interrupt Request (S1PICIR) . . . . . . . . . . . . . . . . . . . . . . . 12-49

Slave 1 PIC In-Service (S1PICISR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-50

Slave 1 PIC Initialization Control Word 1 (S1PICICW1) . . . . . . . . . . . . . 12-51

Slave 1 PIC Operation Control Word 2 (S1PICOCW2) . . . . . . . . . . . . . 12-53

Slave 1 PIC Operation Control Word 3 (S1PICOCW3) . . . . . . . . . . . . . 12-55

Slave 1 PIC Initialization Control Word 2 (S1PICICW2) . . . . . . . . . . . . . 12-57

Slave 1 PIC Initialization Control Word 3 (S1PICICW3) . . . . . . . . . . . . . 12-58

Slave 1 PIC Initialization Control Word 4 (S1PICICW4) . . . . . . . . . . . . . 12-59

Slave 1 PIC Interrupt Mask (S1PICINTMSK) . . . . . . . . . . . . . . . . . . . . . 12-60

Floating Point Error Interrupt Clear (FPUERRCLR) . . . . . . . . . . . . . . . . 12-61

ELANSC520 Datasheet(PDF) 9 Page - Advanced Micro Devices

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