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LC823450 Datasheet(PDF) 66 Page - ON Semiconductor |
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LC823450 Datasheet(HTML) 66 Page - ON Semiconductor |
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66 / 112 page ![]() LC823450 www.onsemi.com 66 Table 29. USB2.0 PHY CHARACTERISTICS (continued) (TA = 25°C, VDD1 = 1.2 V, AVDDUSBPHY1 = DVDDUSBPHY1 = 1.2 V, AVDDUSBPHY2 = 3.3 V) Item Unit Max Min Condition Symbol DRIVER CHARACTERISTICS IN FULL−SPEED: Fall Time(10% − 90%) TFF 4 20 ns Difference Rise and Fall Time Matching TFRFM 90 111.11 % CLOCK TIMING IN FULL−SPEED(INTERNAL SIGNAL FSSEL=’0’): Full−speed Data Rate for hubs and Devices which are High−speed Capable TFDRATHS 11.994 12.006 Mb/s FULL−SPEED DATA TIMINGS(INTERNAL SIGNAL FSSEL=’0’): Source Jitter Total (Including Frequency Tolerance): To Next Transition For Paired Transitions TDJ1 TDJ2 −3.5 −4 3.5 4 ns ns Source Jitter for Differential Transition to SE0 Transition TFDEOP −2 5 ns Receiver Jitter: To Next Transitions For Paired Transitions TJR1 TJR2 −18.5 −9 18.5 9 ns ns Source SE0 Interval of EOP TFEOPT 160 175 ns Receiver SE0 Interval of EOP TFEOPR 82 ns Width of SE0 Interval During Differential Transition TFST 14 ns INPUT LEVELS FOR HIGH−SPEED: High−speed Squelch Detection Threshold (Differential Signal) VHSSQ 100 200 mV High−speed Disconnect Detection Threshold (Differential Signal) VHSDSC 525 625 mV High−speed Data Signaling Common Mode Voltage Range VHSCM −50 500 mV High−speed Differential Input Signaling Level (This Spec is Based on ‘Template 6’) Figure 11 OUTPUT LEVELS FOR HIGH−SPEED: High−speed Idle State VHSOI −10.0 10 mV High−speed Data Signaling High VHSOH 360 440 mV High−speed Data Signaling Low VHSOL −10.0 10 mV Chirp J Level (Different Signal) VCHIRPJ 700 1100 mV Chirp K Level (Different Signal) VCHIRPK −900 −500 mV TERMINATION IN HIGH−SPEED: Termination Voltage in High−speed VHSTERM −10.0 10 mV DRIVER CHARACTERISTICS IN HIGH−SPEED: Rise Time(10% − 90%) VHSR 500 ps Fall Time(10% − 90%) VHSF 500 ps Driver Waveform Requirement Complying with USB2.0 Specification (section 7.1.2) Driver Output Resistance (which also serves as high−speed termination) ZHSDRV 40.5 49.5 Ω CLOCK TIMING IN HIGH−SPEED: High−Speed Data Rate THSDRAT 479.76 480.24 Mb/s HIGH−SPEED DATA TIMINGS: Data Source Jitter Complying with USB2.0 Specification (section 7.1.2) Receiver Jitter Tolerance INPUT LEVELS FOR LOW−SPEED:SAME AS FULL−SPEED OUTPUT LEVELS FOR LOW−SPEED: SAME AS FULL−SPEED |
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