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LC823450 Datasheet(PDF) 77 Page - ON Semiconductor |
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LC823450 Datasheet(HTML) 77 Page - ON Semiconductor |
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77 / 112 page  LC823450 www.onsemi.com 77 PCM Timing • [condition] VDD1 = 0.93 V to 1.27 V, VDD2 = 1.7 V to 1.95 V or 2.7 V to 3.6 V External load 5 pF to 15 pF Master mode Figure 24. Master Mode BCK LRCK DIN tBCKIH tBCKIL tDINS tLRCKO tDINH DOUT tDOUT • [Applied pin] ♦ Clock : BCK0, BCK1 ♦ Output : LRCK0, LRCK1, DOUT0, DOUT1 output ♦ Input : DIN0, DIN1 input Table 41. I/O Voltage (VDD2) 1.7 V to 1.95 V / 2.7 V to 3.6 V Unit External Load 5 pF to 15 pF I/O Drivability 4 mA 2 mA 1 mA Item Symbol Min Max Min Max Min Mix BCKI Low Period tBCKIL 38 − 38 − 38 − ns BCKI High Period tBCKIH 38 − 38 − 38 − ns DIN setup Time tDINS 8 − 8 − 8 − ns DIN Hold Time tDINH 8 − 8 − 8 − ns LRCK Delay Time tLRCKO −10 10 −10 10 −10 10 ns DOUT Delay Time tDOUT −10 10 −10 10 −10 10 ns |
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