Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

BLUENRG-2 Datasheet(PDF) 100 Page - STMicroelectronics

Part # BLUENRG-2
Description  Bluetooth® low energy wireless system-on-chip
PDF  190 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

BLUENRG-2 Datasheet(HTML) 100 Page - STMicroelectronics

Back Button BLUENRG-2 Datasheet HTML 96Page - STMicroelectronics BLUENRG-2 Datasheet HTML 97Page - STMicroelectronics BLUENRG-2 Datasheet HTML 98Page - STMicroelectronics BLUENRG-2 Datasheet HTML 99Page - STMicroelectronics BLUENRG-2 Datasheet HTML 100Page - STMicroelectronics BLUENRG-2 Datasheet HTML 101Page - STMicroelectronics BLUENRG-2 Datasheet HTML 102Page - STMicroelectronics BLUENRG-2 Datasheet HTML 103Page - STMicroelectronics BLUENRG-2 Datasheet HTML 104Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 100 / 190 page
background image
Functional details
BlueNRG-2
100/190
DocID030675 Rev 2
Bit
Field name
Reset
RW
Description
16
RFSRM
0x0
RW
Read-from-slave request mask. RFSRM enables the interrupt
bit RFSR:
0: RFSR interrupt is disabled.
1: RFSR interrupt is enabled.
17
RFSEM
0x0
RW
Read-from-slave empty mask. RFSEM enables the interrupt
bit RFSE:
0: RFSE interrupt is disabled.
1: RFSE interrupt is enabled.
18
WTSRM
0x0
RW
Write-to-slave request mask. WTSRM enables the interrupt bit
WTSR:
0: WTSR interrupt is disabled.
1: WTSR interrupt is enabled.
19
MTDM
0x0
RW
Master transaction done mask. MTDM enables the interrupt bit
MTD:
0: MTD interrupt is disabled.
1: MTD interrupt is enabled.
20
STDM
0x0
RW
Slave transaction done mask. STDM enables the interrupt bit
STD:
0: STDM interrupt is disabled.
1: STDM interrupt is enabled.
23:21
RESERVED
0x0
R
RESERVED
24
MALM
0x0
RW
Master arbitration lost mask. MALM enables the interrupt bit
MAL:
0: MAL interrupt is disabled.
1: MAL interrupt is enabled.
25
BERRM
0x0
RW
Bus error mask. BERRM enables the interrupt bit BERR:
0: BERR interrupt is disabled.
1: BERR interrupt is enabled.
27:26
RESERVED
0x0
R
RESERVED
28
MTDWSM
0x0
RW
Master transaction done without stop mask. MTDWSM
enables the interrupt bit MTDWS:
0: MTDWS interrupt is disabled.
1: MTDWS interrupt is enabled.
31:29
RESERVED
0x0
R
RESERVED



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com