GMS77C1001 datasheet(22/44 Pages) HYNIX

22 / 44 page

GMS77C1000/GMS77C1001

July. 2001 Ver. 1.1

9.3 Special Function Registers

This devices has seven special function register that are the

INDF register, the Program Counter(PC), the STATUS

and I/O data register(RA, RB).

The Special Function Registers are registers used by the

CPU and peripheral functions to control the operation of

the device (Table 9-1).

TMR0, RA and RB are not in the G700 CPU. They are lo-

cated in each peripheral function blocks. All special func-

tion register are placed on data memory map. The INDF

for indirect addressing mode...

Legend : Shaded boxes = unimplemented or unused, - = unimplemented, read as ‘0’

x = unknown, u = unchanged, q = see the tables in Section 17 for possible values.

9.3.1 INDF Register

The INDF register is not physically implemented register,

used for indirect addressing mode. If the INDF register

are accessed, CPU goes to indirect addressing mode. Then

CPU accesses the Data memory which address is the con-

tents of FSR.

If the INDF register are accessed in indirect addressing

mode(I.e., FSR=00H), 00H will be loaded into data bus.

This time, note the arithmetic status bits of STATUS reg-

ister may be affected.

The FSR<4:0> bits are used to select data memory ad-

dresses 00H to 1FH.

GMS77C1000 and GMS77C1001 do not use banking.

FSR<7:5> are unimplemented and read as '1's.

Name

Address

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

Power-On

Reset

RESET and

WDT Reset

TRIS

N/A

I/O control registers (TRISA, TRISB)

1111 1111

OPTION

N/A

Contains control bits to configure Timer0, Timer0/WDT

prescaler and PFD

0011 1111

INDF

00H

Uses contents of FSR to address data memory (not a

physical register)

xxxx xxxx

uuuu uuuu

TMR0

01H

8-bit real-time clock/counter

xxxx xxxx

uuuu uuuu

PCL

02H

Low order 8bits of PC

1111 1111

STATUS

03H

PA0

ZDC

0001 1xxx

000q quuu

FSR

04H

Indirect data memory address pointer

1xxx xxxx

1uuu uuuu

05H

RA3

RA2

RA1

RA0

---- xxxx

---- uuuu

06H

RB7

RB6

RB5

RB4

RB3

RB2

RB1

RB0

xxxx xxxx

uuuu uuuu

TABLE 9-1 SPECIAL FUNCTION REGISTER SUMMARY

FIGURE 9-4 DIRECT/INDIRECT ADDRESSING

(opcode)

(FSR)

location

select

location

select

Data

Memory

00H

0FH

10H

1FH

Direct Addressing

Indirect Addressing

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