SCD1283 datasheet(72/94 Pages) INTEL

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CD1283 — IEEE 1284-Compatible Parallel Interface

Datasheet

This register controls the overall configuration of the parallel port, each of which is described in

IEEE 1284 format below.

7.4.11

Special Command Register

Bit

Description

7:5

Mode Control: These three bits control the type of transfer desired and whether or not it is enabled to do so.

The ManMd bit selects Manual mode, which allows the user direct control over all parallel data and parallel

port control signals. MMDir controls the direction of the MDR (Manual Data register) and ManOE is the output

enable when MMDir

= 1 (output mode).

E1284 allows the parallel port to engage in IEEE 1284 negotiations. ETxfr enables data transfers. ETxfr

enable is only used for data transfers. EPP address read and write functions do not require that the ETxfr bit

be set

Ig_SEL: This bit prevents the CD1284 from considering the state of the nSLCTIN input when deciding

whether or not to accept Compatibility mode forward data transfers.

When Ig_SEL is reset, nSLCTIN must be active (low) to receive data on the parallel port in response to an

nStrobe input. If Ig_SEL is set, nSLCTIN is not considered and data is accepted regardless of its state. The

Ig_SEL bit should be set/reset together with the E1284 bit.

3:2

Host Timer Test Control: These two bits control the clock rate of the host timeout timer and are intended

primarily for manufacturing test purposes. As such, normal user-level programming should leave these bits

cleared (‘0’). When these bits are set to ‘1’, the timer is completely disabled, this is useful for factory debug

purposes.

1:0

Manual Mode Control: These two bits provide direction and output enable manual control over the parallel

port.

ManMd

E1284

Etxfr

Mode

Compatibility mode; transfers disabled.

Compatibility mode; transfers enabled.

IEEE 1284 negotiation; transfers disabled.

IEEE 1284 negotiation; transfers enabled.

Manual mode.

MMDir

ManOE

Mode

Reverse direction.

Forward direction disabled.

Forward direction enabled.

Access: R/W

8-Bit Hex Address: 2A

Default Value: 00

Bit 7Bit 6Bit 5Bit 4Bit 3

Bit 2Bit 1

Bit 0

TestMux

ClrPs

SetPs

EPIrq

RevRq

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