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WM8960CGEFL/V Datasheet(PDF) 33 Page - Cirrus Logic |
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WM8960CGEFL/V Datasheet(HTML) 33 Page - Cirrus Logic |
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33 / 94 page ![]() WM8960 Rev 4.4 33 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R20 (14h) Noise Gate Control 7:3 NGTH [4:0] 00000 Noise gate threshold 00000 -76.5dBfs 00001 -75dBfs … 1.5 dB steps 11110 -31.5dBfs 11111 -30dBfs 0 NGAT 0 Noise gate function enable 0 = disable 1 = enable Table 13 Noise Gate Control OUTPUT SIGNAL PATH The hi-fi DACs and DAC digital filters are enabled by register bits DACL and DACR. The mixers and output drivers can be separately enabled by individual control bits (see “”Analogue Outputs). Thus it is possible to utilise the analogue mixing and amplification provided by the WM8960, irrespective of whether the DACs are enabled or not. The WM8960 DACs receive digital input data on the DACDAT pin. The digital filter block processes the data to provide the following functions: Digital volume control with soft mute and soft un-mute Mono mix 3D stereo enhancement De-emphasis Sigma-delta modulation High performance sigma-delta 24-bit audio DAC converts the digital data into an analogue signal. The analogue outputs from the DACs can then be mixed with the analogue line inputs and the ADC analogue inputs. This mix is fed to the output drivers for headphone or speaker output. OUT3 can provide a mono mix of left and right mixers or a pseudo-ground for capless headphone drive. DIGITAL PLAYBACK (DAC) PATH Digital data is passed to the WM8960 via the flexible audio interface to the hi-fi DACs. The DACs are enabled by the DACL and DACR register bits. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R26 (1Ah) Power Management (2) 8 DACL 0 Left Channel DAC Enable 0 = DAC disabled 1 = DAC enabled 7 DACR 0 Right Channel DAC Enable 0 = DAC disabled 1 = DAC enabled Table 14 DAC Enable Control |
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