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W6100 Datasheet(PDF) 76 Page - WIZnet Co., Ltd

Part # W6100
Description  Hardwired Dual TCP/IP Stack Controller
PDF  149 Pages
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Manufacturer  WIZNET [WIZnet Co., Ltd]
Direct Link  https://www.wiznet.io/ko/Product/
Logo WIZNET - WIZnet Co., Ltd

W6100 Datasheet(HTML) 76 Page - WIZnet Co., Ltd

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5.1.1.3
Data Phase
The length of data phase is selected among N-byte(VDM) or 1,2,4 bytes(FDM) which is
designated in SPI operation mode bits(OM[1:0]) of control phase. Data is transferred through
MOSI or MISO signal from MSB to LSB sequentially.
5.1.2 Variable Length Data Mode (VDM)
In this mode, the data phase length of SPI Frame is determined by CSn which is controlled by
the HOST.
The OM[1:0] of control phase must be set to ’00’ value for VDM mode
5.1.2.1
Write Access in VDM
Figure 9 shows the SPI frame and SPI signals in write access.
In the VDM, CSn(High-to-Low) by HOST informs the start of SPI frame and CSn(Low to High) by
HOST informs the end of SPI Frame to W6100.
In the control phase, RWB is "1" to indicate write access and OM[1:0] is "00" to indicate VDM.
The data bits transmitted through MOSI are synchronized to the SCLK (Falling-Edge).
If more than one byte of data is transmitted continuously, it supports sequential data write.
Figure 9 Write SPI Frame in VDM



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