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W6100 Datasheet(PDF) 37 Page - WIZnet Co., Ltd |
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W6100 Datasheet(HTML) 37 Page - WIZnet Co., Ltd |
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37 / 149 page  W6100 – Hardwired Dual TCP/IP Stack Controller 37/149 4.1.18 PHYSR (PHY Status Register) [RO] [0x3000] [0x00] PHYSR checks PHY operation mode and LINK status set through PHYCR0(PHY Control Register 0). 7 6 5 4 3 2 1 0 CAB - MODE2 MODE1 MODE0 DPX SPD LNK RO RO RO RO RO RO RO Bit Symbol Description 7 CAB Cable OFF bit 1 : Cable Unplugged 0 : Cable Plugged 6 - Reserved [5:3] MODE [2:0] PHY OPMODE MODE2 MODE1 MODE0 Description 0 X X Auto Negotiation 1 0 0 100BASE-TX FDX 1 0 1 100BASE-TX HDX 1 1 0 10BASE-T FDX 1 1 1 10BASE-T HDX 2 DPX Flag Duplex bit (When Link Up) 1 : Half Duplex 0 : Full Duplex 1 SPD Flag Speed bit (When Link Up) 1 : 10Mbps 0 : 100Mbps 0 LNK Flag Link bit 1 : Link Up 0 : Link Down 4.1.19 PHYRAR (PHY Register Address Register) [R=W] [0x3008] [0x00] PHYRAR sets PHY register address in integrated Ethernet PHY. 7 6 5 4 3 2 1 0 - - - A4 A3 A2 A1 A0 R=W R=W R=W R=W R=W |
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