W6100 datasheet(27/149 Pages) WIZNET

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W6100 – Hardwired Dual TCP/IP Stack Controller

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* Register Symbol (Register full Name)

- [Register Type, Register Type, …][Address Offset][Reset Value]

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

Bit Type

Ex) Sn_IR[3:0] denotes Register Symbol[Upper bit : Lower bit].

Sn_IR[3:0] = “0001” is meaning Sn_IR[3]=’0’, Sn_IR[2]=’0’, Sn_IR[1]=’0’ and Sn_IR[0]=’1’

[Register/bit Type]: Type of Register.

[RW : Register / bit available to Read and Write Both

[R=W]: Register / bit which written value and the read value are the same.

[RO]: Read Only Register/bit

[WO]: Write Only Register/bit

[W]: Write Only Register/bit

[WC]: Register/Bit to be clear by writing ‘1’

[W0]: Register/Bit which only ‘0’ can be written

[W1]: Register/bit which only ‘1’ can be written

[AC]: Auto Clear Register/bit

[1]: Always read ‘1’

[0]: Always read ‘0’

[-]: Not available

[Address Offset]: The address offset of the register

[Reset Value]: Default Value.

Ex1) 4.1.28 NETMR (Network Mode Register)

[R=W][0x4008][0x00]

NETMR sets all kinds of block mode and WOL.

ANB

M6B

WOL

IP6B

IP4B

R=W

Ex2) NETMR[ANB]

ANB bit of NETMR

Ex3) NETMR[7:0]

From 7th bit to 0th bit of NETMR

W6100 Datasheet(PDF) 27 Page - WIZnet Co., Ltd

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