ATM90E32AS-AU-R datasheet(76/84 Pages) ATMEL

Part #	ATM90E32AS-AU-R

Description	Enhanced Poly-Phase High-Performance Wide-Span Energy Metering IC

PDF	84 Pages

Scroll/Zoom	100%

Manufacturer	ATMEL [ATMEL Corporation]

Direct Link	http://www.atmel.com

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M90E32AS [Datasheet]

Atmel-46003B-SE-M90E32AS-Datasheet_02122015

6.3

INTERFACE TIMING

6.3.1

SPI INTERFACE TIMING (SLAVE MODE)

The SPI interface timing is as shown in Figure-22 and Table-18.

Figure-22 SPI Timing Diagram

Table-18 SPI Timing Specification

Symbol

Description

Min.

Typical

Max.

Unit

tCSH

Minimum CS High Level Time

note 1+10

tCSS

CS Setup Time

2T+10

tCSD

CS Hold Time

3T+10

tCLD

Clock Disable Time

tCYC

SCLK cycle

7T+10

tCLH

Clock High Level Time

5T+10

tCLL

Clock Low Level Time

2T+10

tDIS

Data Setup Time

2T+10

tDIH

Data Hold Time

1T+10

tDW

Minimum Data Width

3T+10

tPD

Output Delay

2T+20

tDF

Output Disable Time

2T+20

Note:

1. T means system clock cycle. T=1/

fsys_clk

SCLK

SDI

SDO

tCSH

tCSS

High Impedance

tCSD

tCLH

tCLL

tDIS tDIH

tPD

tDF

Valid Input

Valid Output

tCLD

tDW

tCYC

ATM90E32AS-AU-R Datasheet(PDF) 76 Page - ATMEL Corporation

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