ATM90E32AS-AU-R datasheet(30/84 Pages) ATMEL

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M90E32AS [Datasheet]

Atmel-46003B-SE-M90E32AS-Datasheet_02122015

SPI INTERFACE

4.1

INTERFACE DESCRIPTION

Four pins are associated with the interface as below:

•

SDI – Data pin, input.

•

SDO – Data pin, output.

•

SCLK – Clock input pin.

•

CS – Chip select pin Input.

Figure-16 Slave Mode

4.2

SPI INTERFACE

The interface works in slave mode as shown in Figure-16.

4.2.1

SPI SLAVE INTERFACE FORMAT

In the SPI mode, data on SDI is shifted into the chip on the rising edge of SCLK while data on SDO is shifted out of the chip

on the falling edge of SCLK.

Refer to Figure-17 and Figure-18 below for the timing diagram.

Access type:

The first bit on SDI defines the access type as below:

Address:

Fixed 15-bit, following the access type bits. The lower 10-bit is decoded as address; the higher 5 bits are ‘Don't Care’.

Read/Write data:

Fixed as 16 bits.

Read Sequence:

Instruction

Description

Instruction

Format

Read

read from registers

Write

write to registers

SPI Interface logic

(As slave)

MISO

MOSI

SCK

Host controller in

master mode

SCK

GPIO1

MOSI

MISO

SCLK

SDI

SDO

ATM90E32AS-AU-R Datasheet(PDF) 30 Page - ATMEL Corporation

ATM90E32AS-AU-R Datasheet(HTML) 30 Page - ATMEL Corporation

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