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TMS320F28375DPZP Datasheet(PDF) 4 Page - Texas Instruments |
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TMS320F28375DPZP Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 226 page  4 Functional Block Diagram Figure 4-1 shows the CPU system and associated peripherals. 16-/12-bit ADC x4 Analog MUX ADC Result Regs Peripheral Frame 1 Global Shared 16x 4Kx16 GS0-GS15 RAMs CPU1 to CPU2 1Kx16 MSG RAM GPIO MUX, Input X-BAR, Output X-BAR CPU1.M0 RAM 1Kx16 CPU1.M1 RAM 1Kx16 CPU2.M0 RAM 1Kx16 CPU2.M1 RAM 1Kx16 PSWD PSWD Secure Memories shown in Red MEMCPU2 CPU2 to CPU1 1Kx16 MSG RAM MEMCPU1 CPU1 Buses CPU2 Buses A5:0 B5:0 C5:2 ADCIN14 ADCIN15 D5:0 Comparator Subsystem (CMPSS) DAC x3 Config C28 CPU-1 FPU VCU-II TMU CPU Timer 0 CPU Timer 1 CPU Timer 2 ePIE (up to 192 interrupts) WD Timer NMI-WDT C28 CPU-2 FPU VCU-II TMU CPU Timer 0 CPU Timer 1 CPU Timer 2 ePIE (up to 192 interrupts) WD Timer NMI-WDT CPU1.CLA1 Data ROM (4Kx16) CPU1.CLA1 to CPU1 128x16 MSG RAM CPU1 to CPU1.CLA1 128x16 MSG RAM CPU1.D0 RAM 2Kx16 CPU1.D1 RAM 2Kx16 Boot-ROM 32Kx16 Nonsecure Secure-ROM 32Kx16 Secure CPU1 Local Shared 6x 2Kx16 LS0-LS5 RAMs CPU2 to CPU2.CLA1 128x16 MSG RAM CPU2.CLA1 to CPU2 128x16 MSG RAM CPU2.D0 RAM 2Kx16 CPU2.D1 RAM 2Kx16 CPU2.CLA1 Data ROM (4Kx16) Boot-ROM 32Kx16 Nonsecure Secure-ROM 32Kx16 Secure CPU2 Local Shared LS0-LS5 RAMs CPU1.CLA1 CPU1.DMA CPU2.DMA CPU2.CLA1 Data Bus Bridge ePWM-1/../12 eCAP- 1/../6 eQEP-1/2/3 SDFM-1/2 A B C D JTAG AUXCLKIN External Crystal or Oscillator Watchdog 1/2 Main PLL Aux PLL INTOSC1 INTOSC2 Low-Power Mode Control GPIO MUX TRST TCK TDI TMS TDO 6x 2Kx16 Dual Code Security Module + Emulation Code Security Logic (ECSL) Dual Code Security Module + Emulation Code Security Logic (ECSL) Interprocessor Communication (IPC) Module PUMP OTP/Flash Wrapper FLASH 256K x 16 Secure User Configurable DCSM OTP 1K x 16 OTP/Flash Wrapper FLASH 256K x 16 Secure User Configurable DCSM OTP 1K x 16 SCI- A/B/C/D (16L FIFO) I2C-A/B (16L FIFO) Data Bus Bridge CAN- A/B (32-MBOX) Data Bus Bridge GPIO Data Bus Bridge Data Bus Bridge USB Ctrl / PHY USB Ctrl / PHY EMIF1 Data Bus Bridge EMIF2 Data Bus Bridge Peripheral Frame 2 SPI- A/B/C (16L FIFO) McBSP- A/B uPP RAM HRPWM-1/../8 (CPU1 only) Figure 4-1. Functional Block Diagram TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021 www.ti.com 4 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TMS320F28379D TMS320F28379D-Q1 TMS320F28378D TMS320F28377D TMS320F28377D-Q1 TMS320F28376D TMS320F28375D TMS320F28374D |
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