TMS320F28375DPZP datasheet(56/226 Pages) TI

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8.5.3 Reducing Current Consumption

The F2837xD devices provide some methods to reduce the device current consumption:

• Any one of the four low-power modes—IDLE, STANDBY, HALT, and HIBERNATE—could be entered during

idle periods in the application.

• The flash module may be powered down if the code is run from RAM.

• Disable the pullups on pins that assume an output function.

• Each peripheral has an individual clock-enable bit (PCLKCRx). Reduced current consumption may be

achieved by turning off the clock to any peripheral that is not used in a given application. Table 8-1 indicates

the typical current reduction that may be achieved by disabling the clocks using the PCLKCRx register.

• To realize the lowest VDDA current consumption in a low-power mode, see the respective analog chapter of

the TMS320F2837xD Dual-Core Microcontrollers Technical Reference Manual to ensure each module is

powered down as well.

Table 8-1. Current on VDD Supply by Various

Peripherals (at 200 MHz)

PERIPHERAL

MODULE(1) (2)

IDD CURRENT

REDUCTION (mA)

ADC(3)

3.3

CAN

3.3

CLA

1.4

CMPSS(3)

1.4

CPUTIMER

0.3

DAC(3)

0.6

DMA

2.9

eCAP

0.6

EMIF1

2.9

EMIF2

2.6

ePWM1 to ePWM4(4)

4.5

ePWM5 to ePWM12(4)

1.7

HRPWM(4)

1.7

I2C

1.3

McBSP

1.6

SCI

0.9

SDFM

SPI

0.5

uPP

7.3

USB and AUXPLL at 60 MHz

23.8

(1)

At Vmax and 125°C.

(2)

All peripherals are disabled upon reset. Use the PCLKCRx

multiple instances, the current quoted is for a single module.

(3)

This number represents the current drawn by the digital portion

of the ADC, CMPSS, and DAC modules.

(4)

The ePWM is at /2 of SYSCLK.

TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D

TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D

SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021

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TMS320F28375DPZP Datasheet(PDF) 56 Page - Texas Instruments

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