TMS320F28375DPZP datasheet(99/226 Pages) TI

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8.10.1 Analog-to-Digital Converter (ADC)

The ADCs on this device are successive approximation (SAR) style ADCs with selectable resolution of either

16 bits or 12 bits. There are multiple ADC modules which allow simultaneous sampling. The ADC wrapper is

start-of-conversion (SOC) based [see the SOC Principle of Operation section of the TMS320F2837xD Dual-Core

Microcontrollers Technical Reference Manual .

Each ADC has the following features:

• Selectable resolution of 16 bits or 12 bits

• Ratiometric external reference set by VREFHI and VREFLO

• Differential signal conversions (16-bit mode only)

• Single-ended signal conversions (12-bit mode only)

• Input multiplexer with up to 16 channels (single-ended) or 8 channels (differential)

• 16 configurable SOCs

• 16 individually addressable result registers

• Multiple trigger sources

– Software immediate start

– All ePWMs

– GPIO XINT2

– CPU timers

– ADCINT1 or 2

• Four flexible PIE interrupts

• Burst mode

• Four post-processing blocks, each with:

– Saturating offset calibration

– Error from setpoint calculation

– High, low, and zero-crossing compare, with interrupt and ePWM trip capability

– Trigger-to-sample delay capture

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TMS320F28379D, TMS320F28379D-Q1, TMS320F28378D, TMS320F28377D

TMS320F28377D-Q1, TMS320F28376D, TMS320F28375D, TMS320F28374D

SPRS880O – DECEMBER 2013 – REVISED FEBRUARY 2021

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TMS320F28375DPZP Datasheet(PDF) 99 Page - Texas Instruments