EMC1702 datasheet(35/60 Pages) MICROCHIP

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EMC1702



2020 Microchip Technology Inc.

DS20006455A

Bit 7 - BUSY - This bit indicates that one of the ADCs is currently converting. This bit does not cause

either the ALERT or THERM pins to be asserted.

Bit 6 - PEAK - This bit is set when the Peak Detector circuitry has detected a current peak that is

greater than the programmed threshold for longer than the programmed duration. This bit is not sticky

and will be cleared when the condition has been removed. When set, the THERM pin or ALERT pin

(Comparator mode only) may be asserted (see Section 5.19).

Bit 4 - HIGH - This bit is set when any of the temperature channels meets or exceeds its programmed

high limit. This bit will also be set if the VSENSE or VSOURCE channels meet or exceed their respective

high limits. See the High Limit Status Register for specific channel information (Section 5.15). When

set, the ALERT pin is asserted.

Bit 3 - LOW - This bit is set when any of the temperature channels drops below its programmed low

limit. This bit will also be set if the VSENSE or VSOURCE channels drop below their respective low limits.

See the Low Limit Status Register for specific channel information (Section 5.16). When set, the

ALERT pin is asserted.

Bit 2 - FAULT - This bit is set when a diode fault is detected on any of the external diode channels.

See the External Diode Fault Register for specific channel information (Section 5.10). When set, the

ALERT pin is asserted.

Bit 1 - CRIT - This bit is set when any of the temperature channels meets or exceeds its programmed

Tcrit limit. This bit will also be set if the VSENSE or VSOURCE channels meet or exceed their respective

Vcrit limits (see the Section 5.17, "Crit Limit Status Register" for specific channel information). When

set, the THERM pin is asserted. This bit is not sticky and will be cleared when the error condition has

been removed.

5.5

Configuration Register

The Configuration Register controls the basic operation of the device. This register is fully accessible

at either address.

Bit 7 - MASK_ALL - Masks the ALERT pin from asserting.



‘0’ (default) - The ALERT pin is not masked. If any of the appropriate status bits are set, the ALERT

pin will be asserted.



‘1’ - The ALERT pin is masked if configured in Interrupt mode (see Section 4.4.1, "ALERT Pin

Interrupt Mode"). The Status Registers will be updated normally.

Bit 6 - TMEAS / STOP - Controls Temperature measurement modes.



‘0’ (default) - The device is active, measuring all of the temperature channels.



‘1’ - The device is not measuring temperature channels. It will update all of the temperature

channels when a One-Shot command is given.

Bit 5 - ALERT/COMP - Controls the operation of the ALERT pin.



‘0’ (default) - The ALERT pin acts in Interrupt mode as described in Section 4.4.1.



‘1’ - The ALERT pin acts in Comparator mode as described in Section 4.4.2. In this mode the

MASK_ALL bit is ignored.

Bit 4 - DIS_REC1- Disables the Resistance Error Correction (REC) for External Diode 1.

Table 5.5 Configuration Register

ADDR

R/W

DEFAULT

03h

R/W

Configuration

MASK_

ALL

TMEAS

/STOP

ALERT/

COMP

DIS_

REC1

IMEAS

/STOP

DAVG_

DIS

00h

09h

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