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MPC8308CVMADDA Datasheet(PDF) 30 Page - NXP Semiconductors

Part # MPC8308CVMADDA
Description  MPC8308 PowerQUICC II Pro Processor Hardware Specification
PDF  95 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MPC8308CVMADDA Datasheet(HTML) 30 Page - NXP Semiconductors

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MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 4
30
Freescale Semiconductor
High-Speed Serial interfaces (HSSI)
NOTE
Figure 20–Figure 23 are for conceptual reference only. Due to the fact that
clock driver chip's internal structure, output impedance, and termination
requirements are different between various clock driver chip manufacturers,
it is very much possible that the clock circuit reference designs provided by
clock driver chip vendor are different from what is shown below. They
might also vary from one vendor to the other. Therefore, Freescale
Semiconductor can neither provide the optimal clock driver reference
circuits, nor guarantee the correctness of the following clock driver
connection reference circuits. The system designer is recommended to
contact the selected clock driver chip vendor for the optimal reference
circuits with the MPC8308 SerDes reference clock receiver requirement
provided in this document.
This figure shows the SerDes reference clock connection reference circuits for HCSL type clock driver. It
assumes that the DC levels of the clock driver chip is compatible with MPC8308 SerDes reference clock
input’s DC requirement.
Figure 20. DC-Coupled Differential Connection with HCSL Clock Driver (Reference Only)
This figure shows the SerDes reference clock connection reference circuits for LVDS type clock driver.
Since LVDS clock driver’s common mode voltage is higher than the MPC8308’s SerDes reference clock
input’s allowed range (100–400 mV), AC-coupled connection scheme must be used. It assumes the LVDS
output driver features 50-
termination resistor. It also assumes that the LVDS transmitter establishes its
own common mode level without relying on the receiver or other external component.
50
50
SD_REF_CLK
SD_REF_CLK
Clock Driver
100
differential PWB trace
Clock driver vendor dependent
source termination resistor
SerDes Refer.
CLK Receiver
Clock Driver
CLK_Out
CLK_Out
HCSL CLK Driver Chip
33
33
Total 50
Assume clock driver’s
output impedance is about 16

MPC8308
CLK_Out



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