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MPC8308CVMADDA Datasheet(PDF) 43 Page - NXP Semiconductors |
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MPC8308CVMADDA Datasheet(HTML) 43 Page - NXP Semiconductors |
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43 / 95 page  MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 4 Freescale Semiconductor 43 Enhanced Local Bus Figure 31 through Figure 33 show the local bus signals. In what follows, T1, T2, T3, and T4 are internal clock reference phase signals corresponding to LCCR[CLKDIV]. Figure 31. Local Bus Signals, Non-Special Signals Only Figure 32. Local Bus Signals, GPCM/UPM Signals for LCCR[CLKDIV] = 2 Output Signals: LBCTL//LOE/ tLBKHOV t LBKHOV LCLK0 Input Signals: LD[0:15] Output Signals: LA[0:25] t LBIXKH t LBIVKH t LBKHOZ Input Signal: LGTA t LBIXKH t LBIVKH t LBIXKH LCLK0 UPM Mode Input Signal: LUPWAIT tLBIXKH tLBIVKH tLBIVKH tLBIXKH tLBKHOZ T1 T3 Input Signals: LD[0:15] UPM Mode Output Signals: LCS[0:3]/LBS[0:1]/LGPL[0:5] GPCM Mode Output Signals: LCS[0:3]/LWE tLBKHOV tLBKHOV tLBKHOZ |
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