SH79F024XU datasheet(32/92 Pages) SINOWEALTH

32 / 92 page

SH79F

SH79F082

082

Mode

Mode 3:

3: Two

Two

Two 8-bit

8-bit

8-bit Counter/Timers

Counter/Timers

Counter/Timers (Timer

(Timer

(Timer 0

0 Only)

Only)

In Mode 3, Timer 0 is configured as two separate 8-bit counter/timers held in TL0 and TH0. TL0 is controlled using the Timer

0 control/status bits in TCON and TMOD: TR0, C/ T0

———

, GATE0 and TF0. TL0 can use either the system clock or an external

input signal as its time base.

The TH0 is restricted to a timer function sourced by the system clock. TH0 is enabled using the Timer 1 control bit TR1. THx

sets the Timer 1 overflow flag TF1 on overflow and thus controls the Timer 1 interrupt.

When timer 0 is operating in Mode 3, timer 1 can be operated in modes 0, 1 or 2, but it cannot set the TF1 flag and generate

an interrupt. The Timer 1 overflow can generate baud-rates for the EUART. The TH1 and TL1 register is restricted to a timer

function sourced by the system clock, and gate1 is invalid. And the pull high resistor of T1 input pin is also disabled. Timer 1

run control is handled through its mode settings, because TR1 is used by Time 0. When the timer 1 is in mode 0, 1, or 2,

timer 1 is enable. When the timer 1 is in mode 3, timer 1 is disable.

When as Timer, the T0 pin can automatically toggle upon Timer0 overflow by configuring TC0 in TCON1 Register. The T0

pin is automatically set as output by hardware when TC0 is set.

TL0

(8bits)

TF0

Overflow

C/T0

The Block Diagram of mode3 of Timer0

TH0

(8bits)

TF1

Overflow

Flag

Overflow

Flag

Interrupt

Request

Interrupt

Request

0:Switch Off

1:Switch On

0:Switch Off

1:Switch On

GATE0

TR0

TR1

System Clock

C/T0=0 and TC0=1

System Clock

INT0

Note

Note:::: While Timer1 is used as baud rate generator, writing TH1/TL1 will affect the accuracy of baud rate, thus might make

cause communication error.

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