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SH79F024XU Datasheet(PDF) 5 Page - SINOWEALTH Electronic Ltd

Part # SH79F024XU
Description  Enhanced 8051 Microcontroller with 10bit ADC and PWM
PDF  92 Pages
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Manufacturer  SINOWEALTH [SINOWEALTH Electronic Ltd]
Direct Link  https://en.sinowealth.com
Logo SINOWEALTH - SINOWEALTH Electronic Ltd

SH79F024XU Datasheet(HTML) 5 Page - SINOWEALTH Electronic Ltd

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SH79F
SH79F
SH79F
SH79F082
082
082
082
5
5.
5.
5.
5. Pin
Pin
Pin
Pin Description
Description
Description
Description
Pin
Pin
Pin
Pin No.
No.
No.
No.
Type
Type
Type
Type
Description
Description
Description
Description
PORT
PORT
PORT
PORT
P0.0 - P0.6
I/O
General purpose CMOS I/O
P1.0 - P1.5
I/O
General purpose CMOS I/O
P2.1, P2.2, P2.4-P2.6
I/O
General purpose CMOS I/O
P3.1, P3.2, P3.4, P3.5
I/O
General purpose CMOS I/O
Timer
Timer
Timer
Timer
T0
I/O
Timer0 external input/Comparator output
PWM
PWM
PWM
PWM
PWM11, 21
O
PWM Output
PWM1, 2
O
PWM Output
FLT
I
Fault Detect input
ADC
ADC
ADC
ADC
AN0 - AN4
I
ADC input channel
VREF
I
External ADC reference voltage input
Buzzer
Buzzer
Buzzer
Buzzer
BUZZER
O
Buzzer output pin
Interrupt
Interrupt
Interrupt
Interrupt &
&
&
& Reset
Reset
Reset
Reset &
&
&
& Clock
Clock
Clock
Clock &
&
&
& Power
Power
Power
Power
INT0, 1
I
External interrupt
INT40, INT41
I/O
External interrupt 4 input source
RST
————
I
The device will be reset by A low voltage on this pin longer than 10us, An internal
resistor about 30kΩ to VDD, So using only an external capacitor to GND can cause
a power-on reset.
Note
Note
Note
Note: RST pin and JTAG port are shared, so recommend external capacitor less
or equal 0.01uF
XTAL1
I
Oscillator input
XTAL2
O
Oscillator output
GND
P
Ground
V
DD
P
Power supply (3.3 - 5.5V)
EUART
EUART
EUART
EUART
RXD
I/O
EUART data input
TXD
O
EUART data output
OP
OP
OP
OP &
&
&
& CMP
CMP
CMP
CMP
OPP, OPN
I
OP positive/negative input pin
OPOUT
O
OP Output pin
CMP
I
Compare reference negative input pin
Programmer
Programmer
Programmer
Programmer
TDO (P1.2)
O
Debug interface: Test data out
TMS (P1.3)
I
Debug interface: Test mode select
TDI (P1.4)
I
Debug interface: Test data in
TCK (P1.5)
I
Debug interface: Test clock in



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