SPC574S60 datasheet(41/77 Pages) STMICROELECTRONICS

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DS10601 Rev 6

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SPC574Sx

Electrical characteristics

Figure 10. ADC decoupling capacitance/resistance scheme

Note:

All 1.2V pins should be shorted externally on board with minimum resistance and minimum

inductance. It is recommended to use a 1.2V plane on which all 1.2V pins are shorted to

keep resistance and inductance negligible. Recommended capacitors should be placed

very close to the device pins such that parasitic resistance can be reduced. Connection from

VDD_LV pin to capacitor top plate should not exceed more than 5mohm in resistance and

0.5nH in inductance. Similarly connection from bottom plate of capacitor to PCB ground

should not have more than 5mohm resistance and 0.5nH inductance.

DEVICE

VHV_ADC

VREF_ADC

INPUT CHANNEL

VHV_ADC[1:0] VREF_ADC[1:0]

ADC channel[31:0]

Table 22. ADC decoupling capacitance/resistance values

Label

Instances

Value

Recommended commercial components

based on PVT/aging degradation

470 nF

min 1 µF

5 to 8

max 8

1 µF

min 2.2 µF

≥ 8192(1) × Cs(2) × 2(3) = 115 nF

min 200 nF

<= 1/(8192(1) × Fs × Cs(2) × 2(3))=13 Ω

max 10

Factor depending on the ADC 12 bits

Input capacitance Cs = 7 pF

Factor for 2 ADCs on the same physical channel

Table 23. Package ADC supply decoupling capacitance

PAD

eTQFP100 package

VREFH_ADC_S0

VDD_HV_ADC_S0

VREFH_ADC_S1

—

VDD_HV_ADC_E0

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