LPC86X datasheet(17/99 Pages) NXP

17 / 99 page

LPC86x

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Product data sheet

Rev.3 — 28 April 2023

17 of 97

NXP Semiconductors

LPC86x

32-bit Arm Cortex-M0+ microcontroller

8. Functional description

8.1 Arm Cortex-M0+ core

The Arm Cortex-M0+ core runs at an operating frequency of up to 60 MHz using a

two-stage pipeline. The core revision is r0p1.

Integrated in the core are the NVIC and Serial Wire Debug with four breakpoints and two

watchpoints. The Arm Cortex-M0+ core supports a single-cycle I/O enabled port for fast

GPIO access.

The core includes a single-cycle multiplier and a system tick timer.

8.2 On-chip flash program memory

The LPC86x contains up to 64 KB of on-chip flash program memory. The flash memory

supports a 64 Byte page size with page write and erase.

8.3 On-chip SRAM

The LPC86x contains a total of 8 KB of on-chip static RAM data memory in one block.

A bit-band module is added in series with the AHB matrix to allow atomic

read-modify-write operations acting on a single bit.

8.4 On-chip ROM

The on-chip ROM contains the bootloader:

• Boot loader.

• Supports Flash In-Application Programming (IAP).

• Supports In-System Programming (ISP) through USART.

• FRO API.

LPC86X Datasheet(PDF) 17 Page - NXP Semiconductors