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WM8599SEFT/V Datasheet(PDF) 43 Page - Wolfson Microelectronics plc

Part # WM8599SEFT/V
Description  24-bit 192kHz 2Vrms Multi-Channel CODEC
PDF  74 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8599SEFT/V Datasheet(HTML) 43 Page - Wolfson Microelectronics plc

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WM8599
w
PP Rev 1.0 January 2007
43
REGISTER MAP
D ec A d d r He x A d d r N ame
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
He x D e f aul t
0
0 0
DEV ICE_ ID
0x8599
1
0 1
REV ISION
0
0
0
00000
0x00 0 0
20 2
DA C1_CTRL1
0
0
0
0
DA C1_M UTE
DA C1_EN
DA C1_ ZCEN
DA C1_ DEEM PH
DA C1_ LRP
DA C1_B CP
0x00 8 A
3
0 3
DA C1_CTRL2
00
00000000000
0x00 0 0
5
0 5
DA C1_GA INL
0
0
0
0000
DA C1L_ V U
0x00 C8
6
0 6
DA C1_GA INR00
00000
DA C1R _ V U
0x00 C8
7
0 7
DA C2_ CTRL1
0
0
0
0
DA C2_ M UTE
DA C2 _EN
DA C2 _ ZCEN DA C2 _DEEM PH
DA C2_ LRP
DA C2_ B CP
0x00 8 A
8
0 8
DA C2_ CTRL2
00
00000000000
0x00 0 0
10
0A
DA C2_GAINL
0
0
0
0
0
0
0
DAC2L_VU
0x00 C8
11
0B
DA C2_GAINR0
0
0
0
0
0
0
DA C2R
_V U
0x00 C8
12
0 C
ENA B LES
00
0000000000000
GLOB A L_ EN
0x00 0 0
13
0 D
A DC_DIG_ CTRL1
0
0
A DC_ZC_ EN
A DC_ HPD
A DCL_ INV
A DCR_INV
A DC_LRSW A P
A DC_ EN
A DC_LRP
A DC_ B CP
0x20 0 A
14
0 E
A DC_DIG_ CTRL2
00
0000000
0x00 0 0
15
0 F
A DC_DIG_ CTRL3
00
000000000000
A DC_ M STR0x00 0 0
16
10
A DC_DIG_ CTRL4
00
00000
A DCL_V U
0x00 C3
17
11
A DC_DIG_ CTRL5
00
00000
A DCR_V U
0x00 C3
19
13
PGA _GA IN1_L
0
0
0
0
0
0
0
PGA 1L_V U
0x00 0 0
20
14
PGA _GA IN1_R0
0
0
0
0
0
0
PGA 1R
_ V U
0x00 0 0
21
15
PGA_GA IN2_ L
0
0
0
0
0
0
0
PGA2L_ VU
0x00 0 0
22
16
PGA _GA IN2_ R0
0
0
0
0
0
0
PGA 2 R
_ V U
0x00 0 0
23
17
PGA_GA IN3_ L
0
0
0
0
0
0
0
PGA3L_ VU
0x00 0 0
24
18
PGA _GA IN3_ R0
0
0
0
0
0
0
PGA 3 R
_ V U
0x00 0 0
25
19
PGA _CTRL1
0
0
0
0
0
0
0
0
PGA 3R_ZC
PGA 3L_ ZC
PGA 2R_ZC
PGA 2L_ZC
PGA 1R_ZC
PGA 1L_ ZC
TTA CK_ B Y PA SDECAY _B YPA SS
0x00 FC
26
1A
PGA _CTRL2
00
0000000
V OUT3 R_M UTEVOUT3L_ M UTEV OUT2 R_M UTEV OUT2L_ M UTE V OUT1R_ M UTE V OUT1L_ M UTE
M UTE_A LL
0 x00 7E
27
1B
GEN
0
0
0
000000
A UTO_INC
000
0x00 4 8
28
1C
INPUT_CTRL1
0
0
0
0
0x00 0 0
29
1D
INPUT_CTRL2
0
0
0
0
0x00 0 0
30
1E
INPUT_CTRL3
0
0
0
0
0
DC_ SWITCH_ EN
0x00 0 8
31
1F
INPUT_CTRL4
0
0
0
0
0
0
0
0
A DCR_A M P_ENA DCL_ A M P_ EN
PGA 3R_EN
PGA 3L_EN
PGA 2R_EN
PGA 2L_EN
PGA 1R_EN
PGA 1L_ EN
0x00 0 0
32
20
OUTPUT_SEL1
0
0
0
0
0
0
0
0x00 8 8
33
21
OUTPUT_SEL2
0
0
0
0
0
0
0
0x0163
34
22
OUTPUT_SEL3
0
0
0
VOUT3R_EN
V OUT3L_ EN
VOUT2R_EN
V OUT2L_ EN
V OUT1R_EN
V OUT1L_ EN
APE_B
V OUT3 R_TRI
V OUT3 L_ TR I
V OUT2 R_TRI
V OUT2L_ TR I
V OUT1R_TR I
V OUT1L_TRI
0x00 4 0
35
23
BIAS
0
0
0
0
0
0
0
0
BIA S_EN
SOFT_ ST
BUFIOEN
FA ST_EN
VM IDTOG
POB CTRL
0 x0010
36
2 4
PGA _CTRL_ 3
0
0
0
00
PGA _ UPD
000000
PGA _FOR CE
0x00 0 2
37
2 5
I2 S_ M UX 1
00
0000000000000
A DC_ SA FE_ SW
0x00 0 0
38
2 6
I2 S_ M UX 2
00
0000000000000
DA C_ SA FE_ SW
0x00 0 0
Read: DEV ICE_ ID[ 15:0 ] / W rit e: SW _RST
REV NUM [ 7:0]
DA C1_OP_ M UX [ 1:0]
DA C1_ WL[ 1:0]
DA C1_FM T[ 1:0]
DA C1_ SR[ 2:0]
DA C1L_ V OL[ 7:0]
DA C1R_ V OL[ 7:0 ]
A DC_AM P_VOL[ 1:0]
DA C2L_ V OL[ 7:0 ]
DA C2 R_V OL[ 7:0 ]
ADCL_V OL[ 7:0 ]
A DCR_ V OL[ 7:0]
PGA1L_ VOL[ 7:0]
PGA 1R_ V OL[ 7:0 ]
DA C2_ OP_M UX [ 1:0 ]
DA C2 _W L[ 1:0]
DA C2 _FM T[ 1:0]
DA C2 _ SR[ 2:0 ]
A DC_ DA TA _ SEL[ 1:0 ]
A DC_W L[ 1:0 ]
A DC_ FM T[ 1:0 ]
A DC_ B CLKDIV [ 2:0]
A DC_SR[ 2 :0 ]
PGA 2L_ V OL[ 7:0 ]
PGA 2R_V OL7:0]
PGA 3L_ V OL[ 7:0 ]
PGA 3 R_V OL[ 7:0 ]
PGA _ SR[ 2:0 ]
PGA 2L_ IN_ SEL[ 3:0]
PGA 1R_IN_ SEL[ 3:0]
PGA 1L_ IN_ SEL[ 3:0]
PGA 3R_IN_SEL[ 3:0 ]
PGA 3L_IN_ SEL[ 3:0]
PGA 2R_IN_SEL[ 3 :0 ]
A DCR_SEL[3:0 ]
A DCL_SEL[ 3:0]
VM ID_SEL[ 1:0]
PGA _ SEL[ 2:0]
VOUT2L_SEL[2:0]
V OUT1R_SEL[2:0]
V OUT1L_ SEL[ 2:0]
VOUT3R_SEL[ 2:0]
V OUT3L_ SEL[ 2:0]
VOUT2R_SEL[ 2:0 ]



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