TMS320C6421 datasheet(94/227 Pages) TI

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TMS320C6421

Fixed-Point Digital Signal Processor

SPRS346B – JANUARY 2007 – REVISED APRIL 2007

3.7.3.2 Peripherals Spanning Multiple Pin Mux Blocks

Some peripherals span multiple Pin Mux Blocks. To use these peripherals, they must be selected in all of

the relevant Pin Mux Blocks. The following is the list of peripherals that span multiple Pin Mux Blocks:

• McBSP0: Six McBSP0 pins are located in the Serial Port Sub-Block 0, but the CLKS0 pin is muxed in

the Timer0 Block. To select McBSP0 pins, program PINMUX registers as follows:

–

Serial Port Sub-Block 0: SPBK0 = 01

–

Timer0 Block: If CLKS0 pin is desired, program TIM0BK = 10 or 11.

• UART0: The two UART0 data pins are located in the UART0 Data Block, but the two UART0 flow

control pins are located in the UART0 Flow Control Block. To select UART0, program PINMUX

registers as follows:

–

UART0 Data Block: UR0BK = 1

–

UART0 Flow Control Block: If flow control pins are desired, program UR0FCBK = 01.

3.7.3.3 Host Block Muxing

This block of 27 pins consists of HPI, VLYNQ, EMAC(MII), MDIO, and GPIO muxed pins. The following

• PINMUX1.HOSTBK

Table 3-20 summarizes the 27 pins in the Host Block, the multiplexed function on each pin, and the

PINMUX configurations to select the corresponding function.

Device Configurations

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