MPC8280 datasheet(334/1386 Pages) FREESCALE

334 / 1386 page

PCI Bridge

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

9-26

Freescale Semiconductor

9.10.2.2

PCI Outbound Translation

Outbound address translation is provided to allow the outbound transactions to access any address over the

PCI memory or I/O space. Translation window’s base addresses are defined in the PCI outbound base

address registers (refer to Section 9.11.1.4, “PCI Outbound Base Address Registers (POBARx)”).

Transactions to these address ranges are issued on the PCI bus with a translated address. The translation

addresses are defined in the associated PCI outbound translation address registers (POTARs). Outbound

addresses that fall outside the outbound windows are forwarded to the PCI bus without modification.

Figure 9-16 shows an example translation window for outbound memory accesses.

Figure 9-16. Outbound PCI Memory Address Translation

The three sets of outbound translation registers allow three simultaneous translation windows. Software

can move and adjust the host memory window translations and sizes during run-time. This allows software

to access host memory or to address alternate memory space on the fly, but be sure that the PCI outbound

translation windows do not overlap. Also note that the PCI outbound translation windows should not

overlap with the PCI bridge internal register space defined by the PIMMR.

9.10.3

SIU Registers

PCI utilizes fields in general SIU registers (SIUMCR, TESCR1, TESCR2, and L-TESCR1). There are also

two pairs of PCI-specific registers that detect accesses from the 60x bus side to the PCI bridge (other than

PCI internal registers accesses). Refer to Section 4.3.4, “PCI Control Registers.”

60x bus view

PCI memory view

Local memory

PCI memory

System memory

PCI memory

Outbound address

translation

PCI outbound

translation

address

Outbound memory

window

System memory

window

Transactions outside

the window forwarded

without modification

Outbound

memory

window size

PCI outbound

base

address

Outbound

memory

window size

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