Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

MPC8280 Datasheet(PDF) 338 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 338 Page - Freescale Semiconductor, Inc

Back Button MPC8280 Datasheet HTML 334Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 335Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 336Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 337Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 338Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 339Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 340Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 341Page - Freescale Semiconductor, Inc MPC8280 Datasheet HTML 342Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 338 / 1386 page
background image
PCI Bridge
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
9-30
Freescale Semiconductor
9.11.1.1
Message Unit (I2O) Registers
Message unit registers are described in Section 9.12, “Message Unit (I2O),” on page 9-66.
9.11.1.2
DMA Controller Registers
DMA registers are described in Section 9.13, “DMA Controller,” on page 9-86.
9.11.1.3
PCI Outbound Translation Address Registers (POTAR
x)
The PCI outbound translation address registers (POTARx), shown in Figure 9-17, select the starting
addresses in PCI address space for locally generated transactions that hit within the outbound translation
windows. The new translated address is created by concatenating the transaction offset to this translation
address. Refer to Section 9.10.2.2, “PCI Outbound Translation.”
Figure 9-17. PCI Outbound Translation Address Registers (POTAR
x)
0x108E0
PCI inbound comparison mask register 1 (PICMR1)
R/W
0x0000_0000
9.11.1.17/9-43
0x108E8
PCI inbound translation address register 0 (PITAR0)
R/W
0x0000_0000
9.11.1.15/9-42
0x108F0
PCI inbound base address register 0 (PIBAR0)
R/W
0x0000_0000
9.11.1.16/9-42
0x108F8
PCI inbound comparison mask register 0 (PICMR0)
R/W
0x0000_0000
9.11.1.17/9-43
0x10900
PCI CFG_ADDR
R/W
undefined
9.9.1.4.4/9-15
0x10904
PCI CFG_DATA
R/W
0x0000_0000
9.9.1.4.4/9-15
0x10908
PCI INT_ACK
R/W
undefined
9.9.1.4.7/9-17
31
20
19
16
Field
—
TA
Reset
0000_0000_0000_0000
R/W
R/W
Addr
0x10802 (POTAR0); 0x1081A (POTAR1); 0x10832 (POTAR2)
15
0
Field
TA
Reset
0000_0000_0000_0000
R/W
R/W
Addr
0x10800 (POTAR0); 0x10818 (POTAR1); 0x10830 (POTAR2)
Table 9-3. Internal Memory Map (continued)
Address
(offset)
Register
Access
Reset
Section/Page



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com