MPC8280 datasheet(359/1386 Pages) FREESCALE

359 / 1386 page

PCI Bridge

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

9-51

9.11.2.7

Subclass Code Register

Figure 9-39 and Table 9-26 describe the subclass code register.

Figure 9-39. Subclass Code Register

9.11.2.8

PCI Bus Base Class Code Register

Figure 9-40 and Table 9-27 describe the PCI bus class code register.

Figure 9-40. PCI Bus Base Class Code Register

NOTE: I2O Compliancy

When configured as a PCI agent device, the value of the Interface, Subclass

Code, and Base Class Code Registers are 0x01, 0x00, and 0x0E

respectively, indicating that the MPC8280 supports the I2O protocol. The

user should note that the I2O support is not fully standard compliant.

Field

Reset

0000_0000

R/W

Addr

0x0A

Table 9-26. Subclass Code Register Description

Bits

Name

Description

7–0

Subclass code

Identifies more specifically the function of the PCI bridge (0x00 = host bridge and

0x80 = agent mode)

Field

BCC

Reset

Refer to Table 9-27.

R/W

Addr

0x0B

Table 9-27. PCI Bus Base Class Code Register Description

Bits

Name

Description

7–0

Base class code

0x06 When the PCI bridge is configured as a host bridge to indicate “Host Bridge”.

0x0E When the PCI bridge is configured as a target device to indicate the device

is an agent and is I2O capable.

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