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MPC8280 Datasheet(PDF) 490 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 490 Page - Freescale Semiconductor, Inc |
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490 / 1386 page ![]() Memory Controller MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 11-70 Freescale Semiconductor Figure 11-60. UPM Signals Timing Example 11.6.4 The RAM Array The RAM array for each UPM is 64 locations deep and 32 bits wide, as shown in Figure 11-61. The signals at the bottom of Figure 11-61 are UPM outputs. The selected CS is for the bank that matches the current address. The selected BS is for the byte lanes read or written by the access. CSx GPL1 GPL2 CST1 CST2 CST3 CST4 CST1 CST2 CST3 CST4 G1T1 G1T3 Word 1 Word 2 CLKIN T1 T2 T3 T4 G1T1 G1T3 G2T1 G2T3 G2T1 G2T3 |
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