MPC8280 datasheet(660/1386 Pages) FREESCALE

660 / 1386 page

SDMA Channels and IDMA Emulation

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

19-14

Freescale Semiconductor

19.7.1.1

Level-Sensitive Mode

For external devices requiring very high data transfer rates, level-sensitive mode allows the IDMA to use

a maximum bandwidth to service the device. The device requests service by asserting DREQx and leaving

it asserted as long as it needs service. This mode is selected by setting the corresponding RCCR[DRxM].

The IDMA asserts DACK each time it issues a bus transaction to either read or write the peripheral. The

peripheral must use TA and TEA for data validation. DACK is the acknowledgment of the original burst

request given on DREQx. DREQx should be negated during the DACK active period to ensure that no

further transactions are performed.

19.7.1.2

Edge-Sensitive Mode

For external devices that generate a pulsed signal for each operand to be transferred, edge-sensitive mode

should be used. In edge-sensitive mode, the IDMA controller moves one operand for each falling/rising

(as configured by RCCR[EDMx]) edge of DREQx. This mode is selected by clearing the corresponding

RCCR[DRxM] and programming the corresponding RCCR[EDMx] to the proper edge.

When the IDMA controller detects a valid edge on DREQx, a request becomes pending and remains

pending until it is serviced by the IDMA. Subsequent changes on DREQx are ignored until the request

begins to be serviced. The servicing of the request results in one operand being transferred. Each time the

IDMA issues a bus transaction to either read or write the device, the IDMA asserts DACK. The device

must use TA and TEA for data validation. Thus, DACK is the acknowledgment of the original transaction

request given on DREQx.

19.7.2

DONE

This bidirectional open-drain signal is used to indicate the last IDMA transfer. DONE can be an output of

the IDMA in the source or destination bus transaction if the transfer count is exhausted. This function is

controlled by BD[SDN, DDN].

DONE can also operate as an input. When operating in external request modes, DONE may be used as an

input to the IDMA controller to indicate that the device being serviced requires no more transfers. In that

case, the transfer is terminated, the current BD is closed, and an interrupt is generated (if enabled).

NOTE

DONE is ignored if it is asserted externally during internal request mode

(DCM[ERM] = 0).

DONE must not be asserted externally during memory-to-memory transfers

if external request mode is enabled (DCM[ERM] = 1).

19.8

IDMA Operation

Every IDMA operation involves the following steps—IDMA channel initialization, data transfer, and

block termination.

•

During initialization, the core initializes the IDMA_BASE register in the internal parameter RAM

to point to the IDMA-specific table in RAM. This table contains control information for the IDMA

MPC8280 Datasheet(PDF) 660 Page - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 660 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL