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MPC8280 Datasheet(PDF) 836 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 836 Page - Freescale Semiconductor, Inc |
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836 / 1386 page ![]() Universal Serial Bus Controller MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 27-20 Freescale Semiconductor 27.5.7.4 USB Command Register (USCOM) USCOM is used to start the USB transmit operation. Table 27-12 describes USCOM fields. 27.5.7.5 USB Event Register (USBER) The USBER reports events recognized by the USB channel and generates interrupts. Upon recognition of an event, the USB sets its corresponding bit in the USBER. Interrupts generated by this register may be masked in the USB mask register. The USBER may be read at any time. A bit is cleared by writing a one (writing a zero does not affect a bit’s value). More than one bit may be cleared at a time. All unmasked bits must be cleared before the CP will clear the internal interrupt request. This register is cleared at reset. 01 234 567 Field STR FLUSH ISFT DSFT — EP Reset 0000_0000 R/W R/W Addr 0x11B62 Figure 27-13. USB Command Register (USCOM) Table 27-12. USCOM Fields Bits Name Description 0 STR Start FIFO fill. Setting the STR bit to one causes the USB controller to start the filling the corresponding end point transmit FIFO with data. Transmission will begin once the IN token for this end-point is received. The STR bit is read always as a zero. 1 FLUSH Flush FIFO. Setting the FLUSH bit to one causes the USB controller to flush the corresponding end point transmit FIFO. Before flushing the FIFO, the user should issue the Stop_Tx command. After flushing the FIFO the user should issue the Restart_Tx command (Refer to Section 27.7, “USB CP Commands.”). FLUSH is always read as a zero. 2 ISFT Increment Start-of-Frame Time. Setting the ISFT bit increments the start-of-frame time by one. This bit could be used to synchronize the USB frames to an external timing source. 3 DSFT Decrement Start-of-Frame Time. Setting the DSFT bit decrements the start-of-frame time by one. This bit could be used to synchronize the USB frames to an external timing source. 4–5 — Reserved, should be cleared. 6–7 EP End point. Selects one of the four supported end points. 012 34 5 6 7 8 9 10 11 12 13 14 15 Field — SFT RESET IDLE TXE4 TXE3 TXE2 TXE1 SOF BSY TXB RXB Reset 0000_0000_0000_0000 R/W R/W Addr 0x11B70 Figure 27-14. USB Event Register (USBER) |
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