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MPC8280 Datasheet(PDF) 928 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 928 Page - Freescale Semiconductor, Inc

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Multi-Channel Controllers (MCCs)
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
29-38
Freescale Semiconductor
29.8.1.2
Global Transmitter Underrun (GUN)
A global underrun (GUN) event indicates that the MCC’s transmit FIFO array experienced an underrun
condition. This is not due to a lack of ready transmit buffer descriptors (as in the UN condition in an
interrupt queue entry); rather, it indicates a hardware latency issue which could be caused in several ways.
4
FISU
SS7 mode only: FISU transmission started. The CP has started automatic FISU transmission if the first
BD of frame does not have its ready bit set and the SEN_FISU bit is enabled in SS7_OPT register.
Please refer to SEN_FISU bit in Section 29.3.4.3, “SS7 Configuration Register—SS7 Mode.
SLIPE
Only used in conjunction with AAL1 CES. Slip End. Set when an MCC channel interworking with an ATM
channel exits the slip state (the connection’s CESAC falls to the MCC_Start threshold). At this point, the
transmitter stops sending the underrun template (or last buffer) and starts sending valid data.
5
—
Reserved, should be cleared.
SLIPS
Only used in conjunction with AAL1 CES.Slip Start. Set when an MCC channel interworking with an ATM
channel enters a slip state (the channel’s CESAC reaches the MCC_Stop threshold). At this point the
transmitter freezes and begins sending the underrun template (or last buffer) until CESAC falls to the
MCC_Start threshold.
6
UN
Tx no data. The CP sets this flag if there is no data available to be sent to the transmitter. The transmitter
sends an ABORT indication and then sends idles.
7
TXB
Tx buffer. A buffer has been completely transmitted. TXB is set (and an interrupt request is generated)
as soon as the programmed number of PAD characters (or the closing flag, for PAD = 0) is written to
MCC transmit FIFO. This controls when the TXB interrupt is given in relation to the closing flag sent out
at TXD. Section 29.9.2, “Transmit Buffer Descriptor (TxBD)” describes how PAD characters are used.
8
—
Reserved, should be cleared.
9
—
Reserved, should be cleared. (If SS7 mode, refer to the following description.)
AERM
SS7 mode only: Alignment error rate monitor threshold (M value in SS7 channel-specific parameters)
has been reached.
10
NID
Set whenever a pattern that is not an idle pattern is identified.
11
IDL
Idle. Set when the channel’s receiver identifies the first occurrence of idle (0xFFFE) after any non-idle
pattern.
12
MRF
Maximum receive frame length violation. This interrupt occurs when more bytes are received than the
value specified in MFLR. This interrupt is generated as soon as the MFLR value is exceeded; the
remainder of the frame is discarded
13
RXF
Rx frame. A complete HDLC frame has been received.
14
BSY
Busy. A frame was received but was discarded due to lack of buffers.
15
RXB
Rx buffer. A buffer has been received on this channel that was not the last buffer in frame. This interrupt
is also given for different error types that can happen during reception. Error conditions are reported in
the RxBD.
16–17
—
Reserved, should be cleared.
18–25
CN
Channel number. Identifies the requests channel index (0–255).
26–31
—
Reserved, should be cleared.
Table 29-19. Interrupt Circular Table Entry Field Descriptions (continued)
Bits
Name
Description



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