MPC8280 datasheet(1037/1386 Pages) FREESCALE

1037 / 1386 page

ATM Controller and AAL0, AAL1, and AAL5

MPC8280 PowerQUICC II Family Reference Manual, Rev. 1

Freescale Semiconductor

31-77

31.10.5.13 AAL1 CES TxBDs

Refer to Section 32.12.2, “AAL1 CES TxBDs

31.10.5.14 AAL2 TxBDs

Refer to Section 33.3.5.5, “SSSAR Transmit Buffer Descriptor.”

31.10.5.15 AAL5, AAL1 User-Defined Cell—TxBD Extension

In user-defined cell mode, the AAL5 and AAL1 TxBDs are extended to 32 bytes; see Figure 31-53.

NOTE

For AAL0 a complete cell, including the UDC header, is stored in the buffer;

the AAL0 BD size is always 8 bytes.

31.10.6 AAL1 Sequence Number (SN) Protection Table

The 32-byte sequence number protection table, pointed to by AAL1_SNPT_BASE in the ATM parameter

RAM, resides in dual-port RAM and is used for AAL1 only. The table should be initialized according to

Figure 31-54.

4–5

—

Reserved, should be cleared.

Continuous mode

0 Normal operation.

1 The CP does not clear the ready bit after this BD is closed, allowing the associated

buffer to be retransmitted automatically when the CP next accesses this BD.

7–10

—

Reserved, should be cleared.

OAM

Operation and maintenance cell. If OAM is set, the current AAL0 buffer contains an F5

or F4 OAM cell. Performance monitoring calculations are not done on OAM cells.

11–15

—

Reserved, should be cleared.

0x02

—

Reserved, should be cleared.

0x04

—

TXDBPTR Tx data buffer pointer. Points to the address of the associated buffer, which may or may

not be 8-byte-aligned. The buffer may reside in either internal or external memory. This

value is not modified by the CP.

Offset + 0x08

Extra Cell Header.

Used to store the user-defined cell’s extra cell header. The extra cell header can be 1–12 bytes long.

Offset + 0x14

Reserved (12 bytes)

Figure 31-53. User-Defined Cell—TxBD Extension

Table 31-40. AAL0 TxBD Field Descriptions (continued)

Offset

Bits

Name

Description

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