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MPC8280 Datasheet(PDF) 1098 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 1098 Page - Freescale Semiconductor, Inc |
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1098 / 1386 page ![]() ATM AAL1 Circuit Emulation Service MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 32-38 Freescale Semiconductor Figure 32-27. Receive Buffers and BD Table Example 32.12 ATM Controller Buffers Table 32-10 describes properties of the ATM receive and transmit buffers. Table 32-10. Receive and Transmit Buffers AAL Receive Transmit Size Alignment Size Alignment AAL5 Multiple of 48 octets (except last buffer in frame) Double word aligned Any No requirement AAL3/4 At least 44 octets (except last buffer in frame) Double word aligned At least 44 octets No requirement AAL1/ AAL1 CES Multiple of 8 octets No requirement Multiple of 8 octets No requirement AAL0 52-64 octets. Burst-aligned 52–64 octets. No requirement BD memory space RBD_Base Rx BD table of ch 1 Rx BD table of ch 4 RBD_Offset RBD_Base RBD_Offset Pointers RxBD 1 RxBD 2 RxBD 3 RxBD 4 RxBD 5 RxBD 6 RxBD 7 RxBD 8 RxBD 9 RxBD 1 RxBD 2 RxBD 3 RxBD 4 RxBD 5 RxBD 6 Rx buffer 3 of channel 1 Rx buffer 4 of channel 1 Rx buffer 1 of channel 4 Rx buffer 2 of channel 4 Rx buffer 3 of channel 4 Rx buffer 2 of channel 1 Rx buffer 8 of channel 4 • • • • • • Rx buffer 1 of channel 1 Data memory space from ch 1 entry of RCT Pointers from ch 4 entry of RCT |
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