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MPC8280 Datasheet(PDF) 1133 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 1133 Page - Freescale Semiconductor, Inc |
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1133 / 1386 page ![]() ATM AAL2 MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 Freescale Semiconductor 33-27 Table 33-7 describes the CPS RxQD fields. 33.4.4.4 CPS Receive Buffer Descriptor (RxBD) The CPS RxBD structure consists of a BD table that points to data buffers. The RxBDs contain, apart from the buffer pointer, the packet header, as shown in Figure 33-17. The buffers contain the packet payload. Table 33-8 describes the CPS RxBD fields. Table 33-7. CPS RxQD Field Descriptions Offset Bits Name1 1 Boldfaced entries must be initialized by the user. Description 0x00 0–11 — Reserved, should be cleared during initialization. 12 RBM Receive buffer mask. 0 Disable receive buffer interrupt. 1 Enable receive buffer interrupt. 13 — Reserved, should be cleared during initialization. 14–15 SubType SubType. Sublayer type, should be 00 (CPS) for this descriptor. 00 CPS sublayer. 01 CPS switched. 10 SSSAR. 11 Reserved. 0x02 — RxBD Table Offset Holds the offset to the next BD to be opened by the receiver. Should be cleared during initialization. 0x04 — RxBD Table Base Holds the pointer to the first BD in the BD table. 0 1 2 3 4 6 7 8 15 Offset + 0x00 E CM W I — UP CPS Packet Header Offset + 0x02 Packet Header Offset + 0x04 Rx Data Buffer Pointer (RXDBPTR) Offset + 0x06 Figure 33-17. CPS Receive Buffer Descriptor |
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