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MPC8280 Datasheet(PDF) 1232 Page - Freescale Semiconductor, Inc |
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MPC8280 Datasheet(HTML) 1232 Page - Freescale Semiconductor, Inc |
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1232 / 1386 page ![]() ATM Transmission Convergence Layer MPC8280 PowerQUICC II Family Reference Manual, Rev. 1 35-16 Freescale Semiconductor required ATM parameters and data structures have been setup and initialized, implementing a T1 application requires the following steps: 1. Program FCC2 2. Setup I/O Ports and Clocks 3. Enable Tx/Rx on FCC2 4. Program CPM MUX 5. Program the TC block 6. Program the Serial Interface (SI) 7. Enable TDM Step 1 To setup and initialize FCC2, program the FPSMR and GFMR as shown in Table 14. This is for working with one TC block operating in a single PHY environment. The transmitter and receiver should not be enabled at this time. In this example, FCC2 does not discard idle cells. Step 2 Because the FCC2 UTOPIA bus is connected internally to the TC UTOPIA bus, program the parallel ports and BRGs for the active TDM(s). Step 3 To enable receiving and transmitting, FCC2 should be programmed as shown in Table 15. Step 4 To define the connection of FCC2, the CPM MUX should be programmed as shown in Table 16. Table 35-9. Programming the CPM MUX for a TI Application Table 35-7. Programming GFMR and FPSMR to Setup the FCC2 Init Values Description FPSMR2 = 0x0080_0000 UTOPIA Rx and Tx in Master Mode, Idle cells are not discarded GFMR2 = 0x0000_000A ATM Protocol Mode, Receiver and Transmitter are disabled Table 35-8. Enable FCC2 Init Values Description GFMR2 = 0x0000_003A Enable Rx and Tx Init Values Description CMXFCR = 0x0080_0000 FCC2 is connected to the TC Layer CMXUAR = 0x0000 FCC2 as UTOPIA master |
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