TMP88CS38 datasheet(99/226 Pages) TOSHIBA

99 / 226 page

TMP88CS38/CM38A/CP38A

2007-09-12

88CS38-99

To make the transmitter terminate transmit, clear the ACK to “0” before

reading data which is 1 word before the last data to be received. A serial bus

interface circuit does not generate a clock pulse for the acknowledge signal by

clearing ACK. In the interrupt routine of end of transmission, when the BC is set

to “001” and read the data, PIN is set to “1” and generates a clock pulse for a 1-bit

data transfer. In this case, since the master device is a receiver, the SDA line on a

bus keeps the high level. The transmitter receives the high-level signal as an ACK

signal. The receiver indicates to the transmitter that data transfer is complete.

After 1-bit data is received and an interrupt request has occurred, generates the

stop condition to terminate data transter.

Figure 2.9.16 Termination of Data Transfer in Master Receiver Mode

b. When the MST is “0” (Slave mode)

In the slave mode, a serial bus interface circuit operates either in normal slave

mode or in slave mode after losing arbitration.

In the slave mode, the conditions of generating INTSBI are follows:

•

When the received slave address matches to the value set by the I2CAR

•

When a “GENERAL CALL” is received

•

At the end of transferring or receiving after matching of slave address or

receiving of “GENERAL CALL”

A serial bus interface circuit changes to a slave mode if arbitration is lost in the

master mode. And an INTSBI interrupt request occurs when word data transfer

terminates after losing arbitration. The behavior of INTSBI and PIN after losing

arbitration are shown in Table 2.9.2.

Table 2.9.2 The Behavior of INTSBI and PIN after Losing Arbitration

When the arbitration occurs during transmission

of slave address as a master

When the arbitration occurs during transmission

of data as a master transmit mode

INTSBI

INTSIB is generated at the terminatin of word data.

When the slave address matches the value set by

I2CAR, the PIN is cleared to “0” by generating of

INTSBI. When the slave address doesn’t match

the value set by I2CAR, the PIN keeps “1”.

PIN keeps “1”.

Check the AL (Bit3 in the SBISR), the TRX (Bit6 in the SBISR), the AAS (Bit2

in the SBISR), and the AD0 (Bit1 in the SBISR) and implements processes

according to conditions listed in Table 2.9.3.

SCL pin

SDA pin

Acknowledge signal

sent to a transmitter

567

INTSBI interrupt

request

“0”

→ ACK

Read SBIDBR

“001”

→ BC

Read SBIDBR

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