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ATSHA204A Datasheet(PDF) 32 Page - Microchip Technology |
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ATSHA204A Datasheet(HTML) 32 Page - Microchip Technology |
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32 / 93 page ![]() 6.3 I2C Transmission from the ATSHA204A Device When the ATSHA204A is awake and not busy, the bus master can retrieve the current buffer contents from the device using an I2C read. If valid command results are available, the size of the block returned is determined by the particular command that has been run (See Section Security Commands); otherwise, the size of the block (and the first byte returned) is always four: count, status/error and 2-byte CRC. The bus timing is shown in Figure I2C Synchronous Data Timing. Table 6-3. I2C transmission from ATSHA204A Name I2C Name Direction Description Device Address Device Address To Slave This byte selects a particular device on the I2C interface and the ATSHA204A is selected if bits 1 through 7 of this byte match bits 1 through 7 of the I2C_Address byte in the Configuration zone. Bit 0 of this byte is the standard I2C R/W pin and should be one to indicate that the bytes following the device address travel from the slave to the master (read). Data Data1,N To Master The output block, consisting of the count and status/error byte or the output packet followed by the 2-byte CRC per Section 8.2. The status, error, or command outputs can be read repeatedly by the master. Each time a Read command is sent to the ATSHA204A along the I2C interface, the device transmits the next sequential byte in the output buffer. See the following section for details on how the device handles the address counter. If the ATSHA204A is busy, idle, or asleep, it will NACK the device address on a read sequence. If a partial command has been sent to the device, then it will NACK the device address, but float the bus during the data intervals. 6.4 Address Counter Writes to and/or reads from the ATSHA204A I/O buffer over the I2C interface are treated as if the device were a FIFO. Either the I2C byte or block write/read protocols can be used. The number of bytes transferred with each block sequence does not affect the operation of the device. The first byte transmitted to the device is treated as the count byte. Any attempt to send more than this number of bytes or any attempts to write beyond the end of the I/O buffer (84 bytes) causes the ATSHA204A to NACK those bytes. After the Host writes a single command byte to the input buffer, device Read commands from the Host are prohibited until after the device completes command execution. Attempts to read from the device prior to the last command byte being sent results in an ACK of the device address but all ones (0xFF) on the bus. If the master attempts to send a read byte to the device during command execution, the device will NACK the device address. Data may be read from the device under the following three conditions: • Upon power-up, the single byte, 0x11 (See Section Command Opcodes, Short Descriptions and Execution Times), can be read inside a four byte block. • If a complete block has been received by the device, but there are any errors in parsing or executing the command, a single byte of error code is available, also inside a four byte block. • Upon completion of command execution, from 1 to 32 bytes of command result are available to be read inside a block of 4 to 35 bytes. ATSHA204A I2C Interface © 2018 Microchip Technology Inc. DS40002025A-page 32 |
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