M68HC08 datasheet(29/172 Pages) FREESCALE

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FLASH Page Erase Operation

MC68HC908JL3E Family Data Sheet, Rev. 3

Freescale Semiconductor

PGM — Program Control Bit

This read/write bit configures the memory for program operation. This bit and the ERASE bit should

not be set to 1 at the same time.

1 = Program operation selected

0 = Program operation not selected

2.8 FLASH Page Erase Operation

Use the following procedure to erase a page of FLASH memory. A page consists of 64 consecutive bytes

starting from addresses $XX00, $XX40, $XX80 or $XXC0. The 48-byte user interrupt vectors area also

forms a page. Any page within the 4K bytes user memory area ($EC00–$FBFF) can be erased alone.

The 48-byte user interrupt vectors cannot be erased by the page erase operation because of security

reasons. Mass erase is required to erase this page.

Set the ERASE bit and clear the MASS bit in the FLASH Control Register.

Write any data to any FLASH address within the page address range desired.

Wait for a time, tnvs (10µs).

Set the HVEN bit.

Wait for a time tErase (1ms).

Clear the ERASE bit.

Wait for a time, tnvh (5µs).

Clear the HVEN bit.

After time, trcv (1µs), the memory can be accessed in read mode again.

NOTE

Programming and erasing of FLASH locations cannot be performed by

code being executed from the FLASH memory. While these operations

must be performed in the order as shown, but other unrelated operations

may occur between the steps.

2.9 FLASH Mass Erase Operation

Use the following procedure to erase the entire FLASH memory:

Set both the ERASE bit and the MASS bit in the FLASH Control Register.

Write any data to any FLASH location within the FLASH memory address range.

Wait for a time, tnvs (10µs).

Set the HVEN bit.

Wait for a time tMErase (4ms).

Clear the ERASE bit.

Wait for a time, tnvh1 (100µs).

Clear the HVEN bit.

After time, trcv (1µs), the memory can be accessed in read mode again.

NOTE

Programming and erasing of FLASH locations cannot be performed by

code being executed from the FLASH memory. While these operations

must be performed in the order as shown, but other unrelated operations

may occur between the steps.

M68HC08 Datasheet(PDF) 29 Page - Freescale Semiconductor, Inc

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