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M68HC08 Datasheet(PDF) 97 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 97 Page - Freescale Semiconductor, Inc |
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97 / 172 page ![]() I/O Registers MC68HC908JL3E Family Data Sheet, Rev. 3 Freescale Semiconductor 97 ELSxB and ELSxA — Edge/Level Select Bits When channel x is an input capture channel, these read/write bits control the active edge-sensing logic on channel x. When channel x is an output compare channel, ELSxB and ELSxA control the channel x output behavior when an output compare occurs. When ELSxB and ELSxA are both clear, channel x is not connected to an I/O port, and pin TCHx is available as a general-purpose I/O pin. Table 8-3 shows how ELSxB and ELSxA work. Reset clears the ELSxB and ELSxA bits. NOTE Before enabling a TIM channel register for input capture operation, make sure that the TCHx pin is stable for at least two bus clocks. TOVx — Toggle-On-Overflow Bit When channel x is an output compare channel, this read/write bit controls the behavior of the channel x output when the TIM counter overflows. When channel x is an input capture channel, TOVx has no effect. Reset clears the TOVx bit. 1 = Channel x pin toggles on TIM counter overflow. 0 = Channel x pin does not toggle on TIM counter overflow. NOTE When TOVx is set, a TIM counter overflow takes precedence over a channel x output compare if both occur at the same time. CHxMAX — Channel x Maximum Duty Cycle Bit When the TOVx bit is at logic one, setting the CHxMAX bit forces the duty cycle of buffered and unbuffered PWM signals to 100%. As Figure 8-8 shows, the CHxMAX bit takes effect in the cycle after it is set or cleared. The output stays at the 100% duty cycle level until the cycle after CHxMAX is cleared. Table 8-3. Mode, Edge, and Level Selection MSxB MSxA ELSxB ELSxA Mode Configuration X0 0 0 Output Preset Pin under Port Control; Initial Output Level High X1 0 0 Pin under Port Control; Initial Output Level Low 00 0 1 Input Capture Capture on Rising Edge Only 0 0 1 0 Capture on Falling Edge Only 0 0 1 1 Capture on Rising or Falling Edge 01 0 1 Output Compare or PWM Toggle Output on Compare 0 1 1 0 Clear Output on Compare 0 1 1 1 Set Output on Compare 1X 0 1 Buffered Output Compare or Buffered PWM Toggle Output on Compare 1 X 1 0 Clear Output on Compare 1 X 1 1 Set Output on Compare |
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