DAC8760IPWPR.B datasheet(2/69 Pages) TI2

2 / 69 page

Table of Contents

1 Features............................................................................1

2 Applications..................................................................... 1

3 Description.......................................................................1

4 Revision History.............................................................. 2

5 Device Comparison Table...............................................3

6 Pin Configuration and Functions...................................3

7 Specifications.................................................................. 5

7.1 Absolute Maximum Ratings........................................ 5

7.2 ESD Ratings............................................................... 5

7.3 Recommended Operating Conditions.........................5

7.4 Thermal Information....................................................6

7.5 Electrical Characteristics.............................................6

7.6 Electrical Characteristics: AC....................................11

7.7 Timing Requirements: Write Mode............................12

7.8 Timing Requirements: Readback Mode....................12

7.9 Timing Diagrams.......................................................13

7.10 Typical Characteristics............................................ 14

8 Detailed Description......................................................27

8.1 Overview................................................................... 27

8.2 Functional Block Diagram......................................... 27

8.3 Feature Description...................................................28

8.4 Device Functional Modes..........................................37

8.5 Programming............................................................ 40

8.6 Register Maps...........................................................42

9 Application and Implementation.................................. 46

9.1 Application Information............................................. 46

9.2 Typical Application.................................................... 49

10 Power Supply Recommendations..............................52

11 Layout........................................................................... 53

11.1 Layout Guidelines................................................... 53

11.2 Layout Example...................................................... 54

12 Device and Documentation Support..........................55

12.1 Documentation Support.......................................... 55

12.2 Receiving Notification of Documentation Updates..55

12.3 Support Resources................................................. 55

12.4 Trademarks.............................................................55

12.5 Electrostatic Discharge Caution..............................55

12.6 Glossary..................................................................55

13 Mechanical, Packaging, and Orderable

Information.................................................................... 55

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision C (January 2018) to Revision D (December 2021)

Page

• Updated the numbering format for tables, figures, and cross-references throughout the document..................1

• Changed CMP pin description in Pin Functions table to include 100-pF capacitance to ground....................... 3

• Deleted Timing Requirements: Daisy-Chain Mode section and Daisy-Chain Mode Timing figure...................13

• Added 100-pF capacitance to ground for larger external compensation capacitors in Voltage Output Stage

section.............................................................................................................................................................. 28

• Deleted Power-Supply Sequence section........................................................................................................ 31

• Deleted daisy-chain operation content from Watchdog Timer section..............................................................33

• Deleted The DACx760 Shares the SPI Bus With Other Devices subsection from Watchdog Timer section... 33

• Deleted daisy-chain operation content from Frame Error Checking section.................................................... 33

• Added CRC fault software reset command of 0x96 to Frame Error Checking section.....................................33

• Deleted The DACx760 Shares the SPI Bus With Other Devices subsection from Frame Error Checking

section.............................................................................................................................................................. 33

• Changed duplicated 010 step-size from 0.125 to 0.25 in Table 8-3, Slew Rate Step-Size Options ................ 35

• Added CRC fault reset command to Table 8-8, Write Address Functions ....................................................... 40

• Deleted Daisy-Chain Operation section............................................................................................................41

• Added Multiple Devices on the Bus section......................................................................................................41

• Changed Command and Register Map table to delete daisy-chain operation content and add CRC fault reset

content.............................................................................................................................................................. 42

• Changed DCEN to Reserved for DB3 in Table 8-17, Control Register ............................................................43

• Added series resistance for supply and 100-pF capacitance from CMP to GND for Figure 9-3...................... 49

• Added text on fast supply ramp, series resistance for power supply, and content from deleted Power-Supply

Sequence to the Power Supply Recommendations section............................................................................. 52

• Added power supply series resistance and CMP capacitor to GND to Figure 11-1, Layout Example .............54

Changes from Revision B (June 2016) to Revision C (January 2018)

Page

• Added first sentence to second paragraph and added last paragraph to Frame Error Checking section........ 33

• Added last paragraph to User Calibration section ........................................................................................... 34

DAC7760, DAC8760

SBAS528D – JUNE 2013 – REVISED DECEMBER 2021

www.ti.com

Submit Document Feedback

Product Folder Links: DAC7760 DAC8760

DAC8760IPWPR.B Datasheet(PDF) 2 Page - Texas Instruments

DAC8760IPWPR.B Datasheet(HTML) 2 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69

Datasheet Download

Link URL