DAC8760IPWPR.B datasheet(45/69 Pages) TI2

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8.6.1.1.4 Reset Register

The DACx760 reset register is written to at address 0x56. Table 8-22 provides the description.

Table 8-22. Reset Register 0x56

DATA BIT(S)

NAME

DEFAULT

DESCRIPTION

DB15:DB1

0000h

Reserved. Writing to these bits does not cause any change.

DB0

RESET

Software reset bit. Writing 1 to the bit performs a software reset to reset all

registers and the ALARM status to the respective power-on reset default value.

After reset completes the RESET bit clears itself.

8.6.1.1.5 Status Register

This read-only register consists of four ALARM status bits (CRC-FLT, WD-FLT, I-FLT, and T-FLT) and bit SR-ON

that shows the slew rate status.

The device continuously monitors the output and die temperature. When an alarm occurs, the corresponding

ALARM status bit is set (1). Whenever an ALARM status bit is set, it remains set until the event that caused it

is resolved. The ALARM bit can only be cleared by performing a software reset, or a power-on reset (by cycling

power), or having the error condition resolved. These bits are reasserted if the ALARM condition continues to

exist in the next monitoring cycle.

The ALARM bit goes to 0 when the error condition is resolved.

Table 8-23. Status Register

DATA BIT(S)

NAME

DEFAULT

DESCRIPTION

DB15:DB5

000h

Reserved. Reading these bits returns 0.

DB4

CRC-FLT

Bit = 1 indicates CRC error on SPI frame.

Bit = 0 indicates normal operation.

DB3

WD-FLT

Bit = 1 indicates watchdog timer timeout.

Bit = 0 indicates normal operation.

DB2

I-FLT

Bit = 1 indicates Open Circuit or Compliance Voltage Violation in IOUT loading.

Bit = 0 indicates IOUT load is at normal condition.

DB1

SR-ON

Bit = 1 when DAC code is slewing as determined by SRCLK and SRSTEP.

Bit = 0 when DAC code is not slewing.

DB0

T-FLT

Bit = 1 indicates die temperature is over 142°C.

Bit = 0 indicates die temperature is not over 142°C.

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DAC7760, DAC8760

SBAS528D – JUNE 2013 – REVISED DECEMBER 2021

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